13b0de918SJiafei Pan# 23b0de918SJiafei Pan# Copyright 2018-2021 NXP 33b0de918SJiafei Pan# 43b0de918SJiafei Pan# SPDX-License-Identifier: BSD-3-Clause 53b0de918SJiafei Pan# 63b0de918SJiafei Pan 73b0de918SJiafei Pan# SoC-specific build parameters 83b0de918SJiafei PanSOC := ls1043a 93b0de918SJiafei PanPLAT_PATH := plat/nxp 103b0de918SJiafei PanPLAT_COMMON_PATH := plat/nxp/common 113b0de918SJiafei PanPLAT_DRIVERS_PATH := drivers/nxp 123b0de918SJiafei PanPLAT_SOC_PATH := ${PLAT_PATH}/soc-${SOC} 133b0de918SJiafei PanBOARD_PATH := ${PLAT_SOC_PATH}/${BOARD} 143b0de918SJiafei Pan 153b0de918SJiafei Pan# get SoC-specific defnitions 163b0de918SJiafei Paninclude ${PLAT_SOC_PATH}/soc.def 173b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/soc_common_def.mk 183b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk 193b0de918SJiafei Pan 203b0de918SJiafei Pan# For Security Features 213b0de918SJiafei PanDISABLE_FUSE_WRITE := 1 223b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SMMU_NEEDED,BL2)) 23*0ca1d8fbSHoward Luifeq (${TRUSTED_BOARD_BOOT}, 1) 243b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SFP_NEEDED,BL2)) 253b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL2)) 263b0de918SJiafei PanSECURE_BOOT := yes 273b0de918SJiafei Panendif 283b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CRYPTO_NEEDED,BL_COMM)) 293b0de918SJiafei Pan 303b0de918SJiafei Pan# Selecting Drivers for SoC 313b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DCFG_NEEDED,BL_COMM)) 323b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CSU_NEEDED,BL_COMM)) 333b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TIMER_NEEDED,BL_COMM)) 343b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,INTERCONNECT_NEEDED,BL_COMM)) 353b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,GIC_NEEDED,BL31)) 363b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CONSOLE_NEEDED,BL_COMM)) 373b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PMU_NEEDED,BL_COMM)) 383b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DDR_DRIVER_NEEDED,BL2)) 393b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TZASC_NEEDED,BL2)) 403b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,I2C_NEEDED,BL2)) 413b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,IMG_LOADR_NEEDED,BL2)) 423b0de918SJiafei Pan 433b0de918SJiafei Pan# Selecting PSCI & SIP_SVC support 443b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PSCI_NEEDED,BL31)) 453b0de918SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SIPSVC_NEEDED,BL31)) 463b0de918SJiafei Pan 473b0de918SJiafei Pan# Source File Addition 483b0de918SJiafei PanPLAT_INCLUDES += -I${PLAT_COMMON_PATH}/include/default\ 493b0de918SJiafei Pan -I${BOARD_PATH}\ 503b0de918SJiafei Pan -I${PLAT_COMMON_PATH}/include/default/ch_${CHASSIS}\ 513b0de918SJiafei Pan -I${PLAT_SOC_PATH}/include\ 523b0de918SJiafei Pan -I${PLAT_COMMON_PATH}/soc_errata 533b0de918SJiafei Pan 543b0de918SJiafei Panifeq (${SECURE_BOOT},yes) 553b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/tbbr/tbbr.mk 563b0de918SJiafei Panendif 573b0de918SJiafei Pan 583b0de918SJiafei Panifeq ($(WARM_BOOT),yes) 593b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/warm_reset/warm_reset.mk 603b0de918SJiafei Panendif 613b0de918SJiafei Pan 623b0de918SJiafei Panifeq (${NXP_NV_SW_MAINT_LAST_EXEC_DATA}, yes) 633b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/nv_storage/nv_storage.mk 643b0de918SJiafei Panendif 653b0de918SJiafei Pan 663b0de918SJiafei Panifeq (${PSCI_NEEDED}, yes) 673b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/psci/psci.mk 683b0de918SJiafei Panendif 693b0de918SJiafei Pan 703b0de918SJiafei Panifeq (${SIPSVC_NEEDED}, yes) 713b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/sip_svc/sipsvc.mk 723b0de918SJiafei Panendif 733b0de918SJiafei Pan 743b0de918SJiafei Pan# for fuse-fip & fuse-programming 753b0de918SJiafei Panifeq (${FUSE_PROG}, 1) 763b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/fip_handler/fuse_fip/fuse.mk 773b0de918SJiafei Panendif 783b0de918SJiafei Pan 793b0de918SJiafei Panifeq (${IMG_LOADR_NEEDED},yes) 803b0de918SJiafei Paninclude $(PLAT_COMMON_PATH)/img_loadr/img_loadr.mk 813b0de918SJiafei Panendif 823b0de918SJiafei Pan 833b0de918SJiafei Pan# Adding source files for the above selected drivers. 843b0de918SJiafei Paninclude ${PLAT_DRIVERS_PATH}/drivers.mk 853b0de918SJiafei Pan 863b0de918SJiafei Pan# Adding SoC specific files 873b0de918SJiafei Paninclude ${PLAT_COMMON_PATH}/soc_errata/errata.mk 883b0de918SJiafei Pan 893b0de918SJiafei PanPLAT_INCLUDES += ${NV_STORAGE_INCLUDES}\ 903b0de918SJiafei Pan ${WARM_RST_INCLUDES} 913b0de918SJiafei Pan 923b0de918SJiafei PanBL31_SOURCES += ${PLAT_SOC_PATH}/$(ARCH)/${SOC}.S\ 933b0de918SJiafei Pan ${WARM_RST_BL31_SOURCES}\ 943b0de918SJiafei Pan ${PSCI_SOURCES}\ 953b0de918SJiafei Pan ${SIPSVC_SOURCES}\ 963b0de918SJiafei Pan ${PLAT_COMMON_PATH}/$(ARCH)/bl31_data.S 973b0de918SJiafei Pan 983b0de918SJiafei PanPLAT_BL_COMMON_SOURCES += ${PLAT_COMMON_PATH}/$(ARCH)/ls_helpers.S\ 993b0de918SJiafei Pan ${PLAT_SOC_PATH}/aarch64/${SOC}_helpers.S\ 1003b0de918SJiafei Pan ${NV_STORAGE_SOURCES}\ 1013b0de918SJiafei Pan ${WARM_RST_BL_COMM_SOURCES}\ 1023b0de918SJiafei Pan ${PLAT_SOC_PATH}/soc.c 1033b0de918SJiafei Pan 1043b0de918SJiafei Panifeq (${TEST_BL31}, 1) 1053b0de918SJiafei PanBL31_SOURCES += ${PLAT_SOC_PATH}/$(ARCH)/bootmain64.S\ 1063b0de918SJiafei Pan ${PLAT_SOC_PATH}/$(ARCH)/nonboot64.S 1073b0de918SJiafei Panendif 1083b0de918SJiafei Pan 1093b0de918SJiafei PanBL2_SOURCES += ${DDR_CNTLR_SOURCES}\ 1103b0de918SJiafei Pan ${TBBR_SOURCES}\ 1113b0de918SJiafei Pan ${FUSE_SOURCES} 1123b0de918SJiafei Pan 1133b0de918SJiafei Pan# Adding TFA setup files 1143b0de918SJiafei Paninclude ${PLAT_PATH}/common/setup/common.mk 115