xref: /rk3399_ARM-atf/plat/nxp/soc-ls1028a/soc.mk (revision ab5964aadcf090c816804a798c0d49bc0c9b5183)
1*9d250f03SJiafei Pan#
2*9d250f03SJiafei Pan# Copyright 2020-2021 NXP
3*9d250f03SJiafei Pan#
4*9d250f03SJiafei Pan# SPDX-License-Identifier: BSD-3-Clause
5*9d250f03SJiafei Pan#
6*9d250f03SJiafei Pan
7*9d250f03SJiafei Pan# SoC-specific build parameters
8*9d250f03SJiafei PanSOC			:=	ls1028a
9*9d250f03SJiafei PanPLAT_PATH		:=	plat/nxp
10*9d250f03SJiafei PanPLAT_COMMON_PATH	:=	plat/nxp/common
11*9d250f03SJiafei PanPLAT_DRIVERS_PATH	:=	drivers/nxp
12*9d250f03SJiafei PanPLAT_SOC_PATH		:=	${PLAT_PATH}/soc-${SOC}
13*9d250f03SJiafei PanBOARD_PATH		:=	${PLAT_SOC_PATH}/${BOARD}
14*9d250f03SJiafei Pan
15*9d250f03SJiafei Pan# Get SoC-specific definitions
16*9d250f03SJiafei Paninclude ${PLAT_SOC_PATH}/soc.def
17*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/soc_common_def.mk
18*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk
19*9d250f03SJiafei Pan
20*9d250f03SJiafei Panifeq (${TRUSTED_BOARD_BOOT},1)
21*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SMMU_NEEDED,BL2))
22*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SFP_NEEDED,BL2))
23*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL2))
24*9d250f03SJiafei PanSECURE_BOOT := yes
25*9d250f03SJiafei Panendif
26*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CRYPTO_NEEDED,BL_COMM))
27*9d250f03SJiafei Pan
28*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DCFG_NEEDED,BL_COMM))
29*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TIMER_NEEDED,BL_COMM))
30*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,INTERCONNECT_NEEDED,BL_COMM))
31*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,GIC_NEEDED,BL31))
32*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,CONSOLE_NEEDED,BL_COMM))
33*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PMU_NEEDED,BL_COMM))
34*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,DDR_DRIVER_NEEDED,BL2))
35*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,TZASC_NEEDED,BL2))
36*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,I2C_NEEDED,BL2))
37*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,IMG_LOADR_NEEDED,BL2))
38*9d250f03SJiafei Pan
39*9d250f03SJiafei Pan# Selecting PSCI & SIP_SVC support
40*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,PSCI_NEEDED,BL31))
41*9d250f03SJiafei Pan$(eval $(call SET_NXP_MAKE_FLAG,SIPSVC_NEEDED,BL31))
42*9d250f03SJiafei Pan
43*9d250f03SJiafei PanPLAT_INCLUDES		+=	-I${PLAT_COMMON_PATH}/include/default\
44*9d250f03SJiafei Pan				-I${BOARD_PATH}\
45*9d250f03SJiafei Pan				-I${PLAT_COMMON_PATH}/include/default/ch_${CHASSIS}\
46*9d250f03SJiafei Pan				-I${PLAT_SOC_PATH}/include\
47*9d250f03SJiafei Pan				-I${PLAT_COMMON_PATH}/soc_errata
48*9d250f03SJiafei Pan
49*9d250f03SJiafei Panifeq (${SECURE_BOOT},yes)
50*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/tbbr/tbbr.mk
51*9d250f03SJiafei Panendif
52*9d250f03SJiafei Pan
53*9d250f03SJiafei Panifeq ($(WARM_BOOT),yes)
54*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/warm_reset/warm_reset.mk
55*9d250f03SJiafei Panendif
56*9d250f03SJiafei Pan
57*9d250f03SJiafei Panifeq (${NXP_NV_SW_MAINT_LAST_EXEC_DATA}, yes)
58*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/nv_storage/nv_storage.mk
59*9d250f03SJiafei Panendif
60*9d250f03SJiafei Pan
61*9d250f03SJiafei Panifeq (${PSCI_NEEDED}, yes)
62*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/psci/psci.mk
63*9d250f03SJiafei Panendif
64*9d250f03SJiafei Pan
65*9d250f03SJiafei Panifeq (${SIPSVC_NEEDED}, yes)
66*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/sip_svc/sipsvc.mk
67*9d250f03SJiafei Panendif
68*9d250f03SJiafei Pan
69*9d250f03SJiafei Panifeq (${DDR_FIP_IO_NEEDED}, yes)
70*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/fip_handler/ddr_fip/ddr_fip_io.mk
71*9d250f03SJiafei Panendif
72*9d250f03SJiafei Pan
73*9d250f03SJiafei Pan# For fuse-fip & fuse-programming
74*9d250f03SJiafei Panifeq (${FUSE_PROG}, 1)
75*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/fip_handler/fuse_fip/fuse.mk
76*9d250f03SJiafei Panendif
77*9d250f03SJiafei Pan
78*9d250f03SJiafei Panifeq (${IMG_LOADR_NEEDED},yes)
79*9d250f03SJiafei Paninclude $(PLAT_COMMON_PATH)/img_loadr/img_loadr.mk
80*9d250f03SJiafei Panendif
81*9d250f03SJiafei Pan
82*9d250f03SJiafei Pan# Adding source files for the above selected drivers.
83*9d250f03SJiafei Paninclude ${PLAT_DRIVERS_PATH}/drivers.mk
84*9d250f03SJiafei Pan
85*9d250f03SJiafei Pan# Adding SoC specific files
86*9d250f03SJiafei Paninclude ${PLAT_COMMON_PATH}/soc_errata/errata.mk
87*9d250f03SJiafei Pan
88*9d250f03SJiafei PanPLAT_INCLUDES		+=	${NV_STORAGE_INCLUDES}\
89*9d250f03SJiafei Pan				${WARM_RST_INCLUDES}
90*9d250f03SJiafei Pan
91*9d250f03SJiafei PanBL31_SOURCES		+=	${PLAT_SOC_PATH}/$(ARCH)/${SOC}.S\
92*9d250f03SJiafei Pan				${WARM_RST_BL31_SOURCES}\
93*9d250f03SJiafei Pan				${PSCI_SOURCES}\
94*9d250f03SJiafei Pan				${SIPSVC_SOURCES}\
95*9d250f03SJiafei Pan				${PLAT_COMMON_PATH}/$(ARCH)/bl31_data.S
96*9d250f03SJiafei Pan
97*9d250f03SJiafei PanPLAT_BL_COMMON_SOURCES	+=	${PLAT_COMMON_PATH}/$(ARCH)/ls_helpers.S\
98*9d250f03SJiafei Pan				${PLAT_SOC_PATH}/aarch64/${SOC}_helpers.S\
99*9d250f03SJiafei Pan				${NV_STORAGE_SOURCES}\
100*9d250f03SJiafei Pan				${WARM_RST_BL_COMM_SOURCES}\
101*9d250f03SJiafei Pan				${PLAT_SOC_PATH}/soc.c
102*9d250f03SJiafei Pan
103*9d250f03SJiafei Panifeq (${TEST_BL31}, 1)
104*9d250f03SJiafei PanBL31_SOURCES	+=	${PLAT_SOC_PATH}/$(ARCH)/bootmain64.S \
105*9d250f03SJiafei Pan			${PLAT_SOC_PATH}/$(ARCH)/nonboot64.S
106*9d250f03SJiafei Panendif
107*9d250f03SJiafei Pan
108*9d250f03SJiafei PanBL2_SOURCES		+=	${DDR_CNTLR_SOURCES}\
109*9d250f03SJiafei Pan				${TBBR_SOURCES}\
110*9d250f03SJiafei Pan				${FUSE_SOURCES}
111*9d250f03SJiafei Pan
112*9d250f03SJiafei Pan# Adding TFA setup files
113*9d250f03SJiafei Paninclude ${PLAT_PATH}/common/setup/common.mk
114