xref: /rk3399_ARM-atf/plat/nxp/soc-ls1028a/ls1028ardb/platform.c (revision 34e2112d1a3a8e4ea33a24bdc6505518266333a9)
1*34e2112dSJiafei Pan /*
2*34e2112dSJiafei Pan  * Copyright 2020-2021 NXP
3*34e2112dSJiafei Pan  *
4*34e2112dSJiafei Pan  * SPDX-License-Identifier: BSD-3-Clause
5*34e2112dSJiafei Pan  */
6*34e2112dSJiafei Pan 
7*34e2112dSJiafei Pan #include <plat_common.h>
8*34e2112dSJiafei Pan 
9*34e2112dSJiafei Pan #pragma weak board_enable_povdd
10*34e2112dSJiafei Pan #pragma weak board_disable_povdd
11*34e2112dSJiafei Pan 
12*34e2112dSJiafei Pan bool board_enable_povdd(void)
13*34e2112dSJiafei Pan {
14*34e2112dSJiafei Pan #ifdef CONFIG_POVDD_ENABLE
15*34e2112dSJiafei Pan 	return true;
16*34e2112dSJiafei Pan #else
17*34e2112dSJiafei Pan 	return false;
18*34e2112dSJiafei Pan #endif
19*34e2112dSJiafei Pan }
20*34e2112dSJiafei Pan 
21*34e2112dSJiafei Pan bool board_disable_povdd(void)
22*34e2112dSJiafei Pan {
23*34e2112dSJiafei Pan #ifdef CONFIG_POVDD_ENABLE
24*34e2112dSJiafei Pan 	return true;
25*34e2112dSJiafei Pan #else
26*34e2112dSJiafei Pan 	return false;
27*34e2112dSJiafei Pan #endif
28*34e2112dSJiafei Pan }
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