1 /* 2 * Copyright 2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 #include <drivers/arm/gicv3.h> 9 #include <lib/xlat_tables/xlat_tables_v2.h> 10 #include <plat/common/platform.h> 11 #include <plat_console.h> 12 13 static entry_point_info_t bl33_image_ep_info; 14 15 static unsigned int s32g2_mpidr_to_core_pos(unsigned long mpidr); 16 17 static uint32_t get_spsr_for_bl33_entry(void) 18 { 19 unsigned long mode = MODE_EL1; 20 uint32_t spsr; 21 22 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 23 24 return spsr; 25 } 26 27 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 28 u_register_t arg2, u_register_t arg3) 29 { 30 console_s32g2_register(); 31 32 SET_PARAM_HEAD(&bl33_image_ep_info, PARAM_EP, VERSION_1, 0); 33 bl33_image_ep_info.pc = BL33_BASE; 34 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); 35 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 36 } 37 38 void bl31_plat_arch_setup(void) 39 { 40 } 41 42 struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type) 43 { 44 return &bl33_image_ep_info; 45 } 46 47 static int mmap_gic(const gicv3_driver_data_t *gic_data) 48 { 49 size_t gicr_size; 50 int ret; 51 52 ret = mmap_add_dynamic_region(gic_data->gicd_base, 53 gic_data->gicd_base, 54 PAGE_SIZE_64KB, 55 MT_DEVICE | MT_RW | MT_SECURE); 56 if (ret != 0) { 57 return ret; 58 } 59 60 gicr_size = gicv3_redist_size(0x0U); 61 ret = mmap_add_dynamic_region(gic_data->gicr_base, 62 gic_data->gicr_base, 63 gicr_size * gic_data->rdistif_num, 64 MT_DEVICE | MT_RW | MT_SECURE); 65 if (ret != 0) { 66 return ret; 67 } 68 69 return 0; 70 } 71 72 void bl31_platform_setup(void) 73 { 74 static uintptr_t rdistif_base_addrs[PLATFORM_CORE_COUNT]; 75 static gicv3_driver_data_t plat_gic_data = { 76 .gicd_base = PLAT_GICD_BASE, 77 .gicr_base = PLAT_GICR_BASE, 78 .rdistif_num = PLATFORM_CORE_COUNT, 79 .rdistif_base_addrs = rdistif_base_addrs, 80 .mpidr_to_core_pos = s32g2_mpidr_to_core_pos, 81 }; 82 unsigned int pos = plat_my_core_pos(); 83 int ret; 84 85 ret = mmap_gic(&plat_gic_data); 86 if (ret != 0) { 87 panic(); 88 } 89 90 gicv3_driver_init(&plat_gic_data); 91 gicv3_distif_init(); 92 gicv3_rdistif_init(pos); 93 gicv3_cpuif_enable(pos); 94 } 95 96 static unsigned int s32g2_mpidr_to_core_pos(unsigned long mpidr) 97 { 98 int core; 99 100 core = plat_core_pos_by_mpidr(mpidr); 101 if (core < 0) { 102 return 0; 103 } 104 105 return (unsigned int)core; 106 } 107 108