xref: /rk3399_ARM-atf/plat/nxp/common/soc_errata/errata.c (revision 2ea18c7df31f8239e1052f39cf26f1bb8c9d0c25)
164cadc16SJiafei Pan /*
2785ee93cSJiafei Pan  * Copyright 2021-2022 NXP
364cadc16SJiafei Pan  *
464cadc16SJiafei Pan  * SPDX-License-Identifier: BSD-3-Clause
564cadc16SJiafei Pan  *
664cadc16SJiafei Pan  */
764cadc16SJiafei Pan 
89616db15SJiafei Pan #include <common/debug.h>
964cadc16SJiafei Pan 
101ca72295SJiafei Pan #include "errata_list.h"
119616db15SJiafei Pan 
soc_errata(void)129616db15SJiafei Pan void soc_errata(void)
139616db15SJiafei Pan {
149616db15SJiafei Pan #ifdef ERRATA_SOC_A050426
159616db15SJiafei Pan 	INFO("SoC workaround for Errata A050426 was applied\n");
169616db15SJiafei Pan 	erratum_a050426();
179616db15SJiafei Pan #endif
183d14a30bSJiafei Pan #ifdef ERRATA_SOC_A008850
193d14a30bSJiafei Pan 	INFO("SoC workaround for Errata A008850 Early-Phase was applied\n");
203d14a30bSJiafei Pan 	erratum_a008850_early();
213d14a30bSJiafei Pan #endif
22785ee93cSJiafei Pan #if ERRATA_SOC_A009660
23785ee93cSJiafei Pan 	INFO("SoC workaround for Errata A009660 was applied\n");
24785ee93cSJiafei Pan 	erratum_a009660();
25785ee93cSJiafei Pan #endif
2685bd0929SJiafei Pan #if ERRATA_SOC_A010539
2785bd0929SJiafei Pan 	INFO("SoC workaround for Errata A010539 was applied\n");
2885bd0929SJiafei Pan 	erratum_a010539();
2985bd0929SJiafei Pan #endif
3085bd0929SJiafei Pan 
319616db15SJiafei Pan 	/*
329616db15SJiafei Pan 	 * The following DDR Erratas workaround are implemented in DDR driver,
339616db15SJiafei Pan 	 * but print information here.
349616db15SJiafei Pan 	 */
359616db15SJiafei Pan #if ERRATA_DDR_A011396
369616db15SJiafei Pan 	INFO("SoC workaround for DDR Errata A011396 was applied\n");
379616db15SJiafei Pan #endif
389616db15SJiafei Pan #if ERRATA_DDR_A050450
399616db15SJiafei Pan 	INFO("SoC workaround for DDR Errata A050450 was applied\n");
409616db15SJiafei Pan #endif
41291adf52SPankit Garg #if ERRATA_DDR_A050958
42291adf52SPankit Garg 	INFO("SoC workaround for DDR Errata A050958 was applied\n");
43291adf52SPankit Garg #endif
44*3412716bSJiafei Pan #if ERRATA_DDR_A008511
45*3412716bSJiafei Pan 	INFO("SoC workaround for DDR Errata A008511 was applied\n");
46*3412716bSJiafei Pan #endif
47*3412716bSJiafei Pan #if ERRATA_DDR_A009803
48*3412716bSJiafei Pan 	INFO("SoC workaround for DDR Errata A009803 was applied\n");
49*3412716bSJiafei Pan #endif
50*3412716bSJiafei Pan #if ERRATA_DDR_A009942
51*3412716bSJiafei Pan 	INFO("SoC workaround for DDR Errata A009942 was applied\n");
52*3412716bSJiafei Pan #endif
53*3412716bSJiafei Pan #if ERRATA_DDR_A010165
54*3412716bSJiafei Pan 	INFO("SoC workaround for DDR Errata A010165 was applied\n");
55*3412716bSJiafei Pan #endif
56*3412716bSJiafei Pan #if ERRATA_DDR_A009663
57*3412716bSJiafei Pan 	INFO("SoC workaround for DDR Errata A009663 was applied\n");
58*3412716bSJiafei Pan #endif
599616db15SJiafei Pan }
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