1*7c2d1779SPankaj Gupta# 2*7c2d1779SPankaj Gupta# Copyright 2020 NXP 3*7c2d1779SPankaj Gupta# 4*7c2d1779SPankaj Gupta# SPDX-License-Identifier: BSD-3-Clause 5*7c2d1779SPankaj Gupta# 6*7c2d1779SPankaj Gupta 7*7c2d1779SPankaj Gupta# NXP Non-Volatile data flag storage used and then cleared by SW on boot-up 8*7c2d1779SPankaj Gupta 9*7c2d1779SPankaj Gupta$(eval $(call add_define,NXP_NV_SW_MAINT_LAST_EXEC_DATA)) 10*7c2d1779SPankaj Gupta 11*7c2d1779SPankaj Guptaifeq ($(NXP_COINED_BB),yes) 12*7c2d1779SPankaj Gupta$(eval $(call add_define,NXP_COINED_BB)) 13*7c2d1779SPankaj Gupta# BL2 : To read the reset cause from LP SECMON GPR register 14*7c2d1779SPankaj Gupta# BL31: To write the reset cause to LP SECMON GPR register 15*7c2d1779SPankaj Gupta$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL_COMM)) 16*7c2d1779SPankaj Gupta 17*7c2d1779SPankaj Gupta# BL2: DDR training data is stored on Flexspi NOR. 18*7c2d1779SPankaj Guptaifneq (${BOOT_MODE},flexspi_nor) 19*7c2d1779SPankaj Gupta$(eval $(call SET_NXP_MAKE_FLAG,XSPI_NEEDED,BL2)) 20*7c2d1779SPankaj Guptaendif 21*7c2d1779SPankaj Gupta 22*7c2d1779SPankaj Guptaelse 23*7c2d1779SPankaj Gupta$(eval $(call add_define_val,DEFAULT_NV_STORAGE_BASE_ADDR,'${BL2_BIN_XSPI_NOR_END_ADDRESS} - 2 * ${NXP_XSPI_NOR_UNIT_SIZE}')) 24*7c2d1779SPankaj Gupta$(eval $(call SET_NXP_MAKE_FLAG,XSPI_NEEDED,BL_COMM)) 25*7c2d1779SPankaj Guptaendif 26*7c2d1779SPankaj Gupta 27*7c2d1779SPankaj GuptaNV_STORAGE_INCLUDES += -I${PLAT_COMMON_PATH}/nv_storage 28*7c2d1779SPankaj Gupta 29*7c2d1779SPankaj GuptaNV_STORAGE_SOURCES += ${PLAT_COMMON_PATH}/nv_storage/plat_nv_storage.c 30