1# 2# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7TZDRAM_BASE := 0xFF800000 8$(eval $(call add_define,TZDRAM_BASE)) 9 10ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT := 1 11$(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT)) 12 13PLATFORM_CLUSTER_COUNT := 2 14$(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) 15 16PLATFORM_MAX_CPUS_PER_CLUSTER := 4 17$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) 18 19MAX_XLAT_TABLES := 10 20$(eval $(call add_define,MAX_XLAT_TABLES)) 21 22MAX_MMAP_REGIONS := 16 23$(eval $(call add_define,MAX_MMAP_REGIONS)) 24 25ENABLE_WDT_LEGACY_FIQ_HANDLING := 1 26$(eval $(call add_define,ENABLE_WDT_LEGACY_FIQ_HANDLING)) 27 28PLAT_INCLUDES += -I${SOC_DIR}/drivers/se 29 30BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \ 31 lib/cpus/aarch64/cortex_a53.S \ 32 lib/cpus/aarch64/cortex_a57.S \ 33 ${COMMON_DIR}/drivers/bpmp/bpmp.c \ 34 ${COMMON_DIR}/drivers/flowctrl/flowctrl.c \ 35 ${COMMON_DIR}/drivers/memctrl/memctrl_v1.c \ 36 ${SOC_DIR}/plat_psci_handlers.c \ 37 ${SOC_DIR}/plat_setup.c \ 38 ${SOC_DIR}/drivers/se/security_engine.c \ 39 ${SOC_DIR}/plat_secondary.c \ 40 ${SOC_DIR}/plat_sip_calls.c 41 42# Enable workarounds for selected Cortex-A57 erratas. 43A57_DISABLE_NON_TEMPORAL_HINT := 1 44ERRATA_A57_826974 := 1 45ERRATA_A57_826977 := 1 46ERRATA_A57_828024 := 1 47ERRATA_A57_829520 := 1 48ERRATA_A57_833471 := 1 49 50# Enable workarounds for selected Cortex-A53 erratas. 51A53_DISABLE_NON_TEMPORAL_HINT := 1 52ERRATA_A53_826319 := 1 53ERRATA_A53_836870 := 1 54ERRATA_A53_855873 := 1 55 56# Skip L1 $ flush when powering down Cortex-A57 CPUs 57SKIP_A57_L1_FLUSH_PWR_DWN := 1 58