1# 2# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7TZDRAM_BASE := 0xFF800000 8$(eval $(call add_define,TZDRAM_BASE)) 9 10ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT := 1 11$(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT)) 12 13PLATFORM_CLUSTER_COUNT := 2 14$(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) 15 16PLATFORM_MAX_CPUS_PER_CLUSTER := 4 17$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) 18 19MAX_XLAT_TABLES := 10 20$(eval $(call add_define,MAX_XLAT_TABLES)) 21 22MAX_MMAP_REGIONS := 15 23$(eval $(call add_define,MAX_MMAP_REGIONS)) 24 25PLAT_INCLUDES += -I${SOC_DIR}/drivers/se 26 27BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \ 28 lib/cpus/aarch64/cortex_a53.S \ 29 lib/cpus/aarch64/cortex_a57.S \ 30 ${COMMON_DIR}/drivers/bpmp/bpmp.c \ 31 ${COMMON_DIR}/drivers/flowctrl/flowctrl.c \ 32 ${COMMON_DIR}/drivers/memctrl/memctrl_v1.c \ 33 ${SOC_DIR}/plat_psci_handlers.c \ 34 ${SOC_DIR}/plat_setup.c \ 35 ${SOC_DIR}/drivers/se/security_engine.c \ 36 ${SOC_DIR}/plat_secondary.c 37 38# Enable workarounds for selected Cortex-A57 erratas. 39A57_DISABLE_NON_TEMPORAL_HINT := 1 40ERRATA_A57_826974 := 1 41ERRATA_A57_826977 := 1 42ERRATA_A57_828024 := 1 43ERRATA_A57_829520 := 1 44ERRATA_A57_833471 := 1 45 46# Enable workarounds for selected Cortex-A53 erratas. 47A53_DISABLE_NON_TEMPORAL_HINT := 1 48ERRATA_A53_826319 := 1 49ERRATA_A53_836870 := 1 50ERRATA_A53_855873 := 1 51