xref: /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/plat_setup.c (revision 08438e24e10504642634da9ee3dde794ac6fa8f0)
1*08438e24SVarun Wadekar /*
2*08438e24SVarun Wadekar  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3*08438e24SVarun Wadekar  *
4*08438e24SVarun Wadekar  * Redistribution and use in source and binary forms, with or without
5*08438e24SVarun Wadekar  * modification, are permitted provided that the following conditions are met:
6*08438e24SVarun Wadekar  *
7*08438e24SVarun Wadekar  * Redistributions of source code must retain the above copyright notice, this
8*08438e24SVarun Wadekar  * list of conditions and the following disclaimer.
9*08438e24SVarun Wadekar  *
10*08438e24SVarun Wadekar  * Redistributions in binary form must reproduce the above copyright notice,
11*08438e24SVarun Wadekar  * this list of conditions and the following disclaimer in the documentation
12*08438e24SVarun Wadekar  * and/or other materials provided with the distribution.
13*08438e24SVarun Wadekar  *
14*08438e24SVarun Wadekar  * Neither the name of ARM nor the names of its contributors may be used
15*08438e24SVarun Wadekar  * to endorse or promote products derived from this software without specific
16*08438e24SVarun Wadekar  * prior written permission.
17*08438e24SVarun Wadekar  *
18*08438e24SVarun Wadekar  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*08438e24SVarun Wadekar  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*08438e24SVarun Wadekar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*08438e24SVarun Wadekar  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*08438e24SVarun Wadekar  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*08438e24SVarun Wadekar  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*08438e24SVarun Wadekar  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*08438e24SVarun Wadekar  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*08438e24SVarun Wadekar  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*08438e24SVarun Wadekar  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*08438e24SVarun Wadekar  * POSSIBILITY OF SUCH DAMAGE.
29*08438e24SVarun Wadekar  */
30*08438e24SVarun Wadekar 
31*08438e24SVarun Wadekar #include <console.h>
32*08438e24SVarun Wadekar #include <tegra_def.h>
33*08438e24SVarun Wadekar #include <xlat_tables.h>
34*08438e24SVarun Wadekar 
35*08438e24SVarun Wadekar /* sets of MMIO ranges setup */
36*08438e24SVarun Wadekar #define MMIO_RANGE_0_ADDR	0x50000000
37*08438e24SVarun Wadekar #define MMIO_RANGE_1_ADDR	0x60000000
38*08438e24SVarun Wadekar #define MMIO_RANGE_2_ADDR	0x70000000
39*08438e24SVarun Wadekar #define MMIO_RANGE_SIZE		0x200000
40*08438e24SVarun Wadekar 
41*08438e24SVarun Wadekar /*
42*08438e24SVarun Wadekar  * Table of regions to map using the MMU.
43*08438e24SVarun Wadekar  */
44*08438e24SVarun Wadekar static const mmap_region_t tegra_mmap[] = {
45*08438e24SVarun Wadekar 	MAP_REGION_FLAT(MMIO_RANGE_0_ADDR, MMIO_RANGE_SIZE,
46*08438e24SVarun Wadekar 			MT_DEVICE | MT_RW | MT_SECURE),
47*08438e24SVarun Wadekar 	MAP_REGION_FLAT(MMIO_RANGE_1_ADDR, MMIO_RANGE_SIZE,
48*08438e24SVarun Wadekar 			MT_DEVICE | MT_RW | MT_SECURE),
49*08438e24SVarun Wadekar 	MAP_REGION_FLAT(MMIO_RANGE_2_ADDR, MMIO_RANGE_SIZE,
50*08438e24SVarun Wadekar 			MT_DEVICE | MT_RW | MT_SECURE),
51*08438e24SVarun Wadekar 	{0}
52*08438e24SVarun Wadekar };
53*08438e24SVarun Wadekar 
54*08438e24SVarun Wadekar /*******************************************************************************
55*08438e24SVarun Wadekar  * Set up the pagetables as per the platform memory map & initialize the MMU
56*08438e24SVarun Wadekar  ******************************************************************************/
57*08438e24SVarun Wadekar const mmap_region_t *plat_get_mmio_map(void)
58*08438e24SVarun Wadekar {
59*08438e24SVarun Wadekar 	/* MMIO space */
60*08438e24SVarun Wadekar 	return tegra_mmap;
61*08438e24SVarun Wadekar }
62*08438e24SVarun Wadekar 
63*08438e24SVarun Wadekar /*******************************************************************************
64*08438e24SVarun Wadekar  * Handler to get the System Counter Frequency
65*08438e24SVarun Wadekar  ******************************************************************************/
66*08438e24SVarun Wadekar uint64_t plat_get_syscnt_freq(void)
67*08438e24SVarun Wadekar {
68*08438e24SVarun Wadekar 	return 19200000;
69*08438e24SVarun Wadekar }
70