1 /* 2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch_helpers.h> 32 #include <assert.h> 33 #include <debug.h> 34 #include <mmio.h> 35 #include <platform.h> 36 #include <platform_def.h> 37 #include <psci.h> 38 #include <pmc.h> 39 #include <flowctrl.h> 40 #include <tegra_def.h> 41 #include <tegra_private.h> 42 43 static int cpu_powergate_mask[PLATFORM_MAX_CPUS_PER_CLUSTER]; 44 45 int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl) 46 { 47 /* There's nothing to be done for affinity level 1 */ 48 if (afflvl == MPIDR_AFFLVL1) 49 return PSCI_E_SUCCESS; 50 51 switch (id) { 52 /* Prepare for cpu idle */ 53 case PSTATE_ID_CORE_POWERDN: 54 tegra_fc_cpu_idle(read_mpidr()); 55 return PSCI_E_SUCCESS; 56 57 /* Prepare for cluster idle */ 58 case PSTATE_ID_CLUSTER_IDLE: 59 tegra_fc_cluster_idle(read_mpidr()); 60 return PSCI_E_SUCCESS; 61 62 /* Prepare for cluster powerdn */ 63 case PSTATE_ID_CLUSTER_POWERDN: 64 tegra_fc_cluster_powerdn(read_mpidr()); 65 return PSCI_E_SUCCESS; 66 67 /* Prepare for system idle */ 68 case PSTATE_ID_SOC_POWERDN: 69 70 /* Enter system suspend state */ 71 tegra_pm_system_suspend_entry(); 72 73 /* suspend the entire soc */ 74 tegra_fc_soc_powerdn(read_mpidr()); 75 76 return PSCI_E_SUCCESS; 77 78 default: 79 ERROR("Unknown state id (%d)\n", id); 80 break; 81 } 82 83 return PSCI_E_NOT_SUPPORTED; 84 } 85 86 int tegra_prepare_cpu_on_finish(unsigned long mpidr) 87 { 88 /* 89 * Check if we are exiting from SOC_POWERDN. 90 */ 91 if (tegra_system_suspended()) { 92 93 /* 94 * Restore Boot and Power Management Processor (BPMP) reset 95 * address and reset it. 96 */ 97 tegra_fc_reset_bpmp(); 98 99 /* 100 * System resume complete. 101 */ 102 tegra_pm_system_suspend_exit(); 103 } 104 105 /* 106 * T210 has a dedicated ARMv7 boot and power mgmt processor, BPMP. It's 107 * used for power management and boot purposes. Inform the BPMP that 108 * we have completed the cluster power up. 109 */ 110 if (psci_get_max_phys_off_afflvl() == MPIDR_AFFLVL1) 111 tegra_fc_lock_active_cluster(); 112 113 return PSCI_E_SUCCESS; 114 } 115 116 int tegra_prepare_cpu_on(unsigned long mpidr) 117 { 118 int cpu = mpidr & MPIDR_CPU_MASK; 119 120 /* Turn on CPU using flow controller or PMC */ 121 if (cpu_powergate_mask[cpu] == 0) { 122 tegra_pmc_cpu_on(cpu); 123 cpu_powergate_mask[cpu] = 1; 124 } else { 125 tegra_fc_cpu_on(cpu); 126 } 127 128 return PSCI_E_SUCCESS; 129 } 130 131 int tegra_prepare_cpu_off(unsigned long mpidr) 132 { 133 tegra_fc_cpu_off(mpidr & MPIDR_CPU_MASK); 134 return PSCI_E_SUCCESS; 135 } 136