xref: /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/plat_smmu.c (revision 2cd2e399f60b11a3bf1cc6e7988425d0d714a975)
1 /*
2  * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <common/bl_common.h>
8 #include <common/debug.h>
9 #include <smmu.h>
10 #include <tegra_def.h>
11 
12 /*******************************************************************************
13  * Array to hold SMMU context for Tegra186
14  ******************************************************************************/
15 static __attribute__((aligned(16))) smmu_regs_t tegra194_smmu_context[] = {
16 	_START_OF_TABLE_,
17 	mc_make_sid_security_cfg(HDAR),
18 	mc_make_sid_security_cfg(HOST1XDMAR),
19 	mc_make_sid_security_cfg(NVENCSRD),
20 	mc_make_sid_security_cfg(SATAR),
21 	mc_make_sid_security_cfg(NVENCSWR),
22 	mc_make_sid_security_cfg(HDAW),
23 	mc_make_sid_security_cfg(SATAW),
24 	mc_make_sid_security_cfg(ISPRA),
25 	mc_make_sid_security_cfg(ISPFALR),
26 	mc_make_sid_security_cfg(ISPWA),
27 	mc_make_sid_security_cfg(ISPWB),
28 	mc_make_sid_security_cfg(XUSB_HOSTR),
29 	mc_make_sid_security_cfg(XUSB_HOSTW),
30 	mc_make_sid_security_cfg(XUSB_DEVR),
31 	mc_make_sid_security_cfg(XUSB_DEVW),
32 	mc_make_sid_security_cfg(TSECSRD),
33 	mc_make_sid_security_cfg(TSECSWR),
34 	mc_make_sid_security_cfg(SDMMCRA),
35 	mc_make_sid_security_cfg(SDMMCR),
36 	mc_make_sid_security_cfg(SDMMCRAB),
37 	mc_make_sid_security_cfg(SDMMCWA),
38 	mc_make_sid_security_cfg(SDMMCW),
39 	mc_make_sid_security_cfg(SDMMCWAB),
40 	mc_make_sid_security_cfg(VICSRD),
41 	mc_make_sid_security_cfg(VICSWR),
42 	mc_make_sid_security_cfg(VIW),
43 	mc_make_sid_security_cfg(NVDECSRD),
44 	mc_make_sid_security_cfg(NVDECSWR),
45 	mc_make_sid_security_cfg(APER),
46 	mc_make_sid_security_cfg(APEW),
47 	mc_make_sid_security_cfg(NVJPGSRD),
48 	mc_make_sid_security_cfg(NVJPGSWR),
49 	mc_make_sid_security_cfg(SESRD),
50 	mc_make_sid_security_cfg(SESWR),
51 	mc_make_sid_security_cfg(AXIAPR),
52 	mc_make_sid_security_cfg(AXIAPW),
53 	mc_make_sid_security_cfg(ETRR),
54 	mc_make_sid_security_cfg(ETRW),
55 	mc_make_sid_security_cfg(TSECSRDB),
56 	mc_make_sid_security_cfg(TSECSWRB),
57 	mc_make_sid_security_cfg(AXISR),
58 	mc_make_sid_security_cfg(AXISW),
59 	mc_make_sid_security_cfg(EQOSR),
60 	mc_make_sid_security_cfg(EQOSW),
61 	mc_make_sid_security_cfg(UFSHCR),
62 	mc_make_sid_security_cfg(UFSHCW),
63 	mc_make_sid_security_cfg(NVDISPLAYR),
64 	mc_make_sid_security_cfg(BPMPR),
65 	mc_make_sid_security_cfg(BPMPW),
66 	mc_make_sid_security_cfg(BPMPDMAR),
67 	mc_make_sid_security_cfg(BPMPDMAW),
68 	mc_make_sid_security_cfg(AONR),
69 	mc_make_sid_security_cfg(AONW),
70 	mc_make_sid_security_cfg(AONDMAR),
71 	mc_make_sid_security_cfg(AONDMAW),
72 	mc_make_sid_security_cfg(SCER),
73 	mc_make_sid_security_cfg(SCEW),
74 	mc_make_sid_security_cfg(SCEDMAR),
75 	mc_make_sid_security_cfg(SCEDMAW),
76 	mc_make_sid_security_cfg(APEDMAR),
77 	mc_make_sid_security_cfg(APEDMAW),
78 	mc_make_sid_security_cfg(NVDISPLAYR1),
79 	mc_make_sid_security_cfg(VICSRD1),
80 	mc_make_sid_security_cfg(NVDECSRD1),
81 	mc_make_sid_security_cfg(VIFALR),
82 	mc_make_sid_security_cfg(VIFALW),
83 	mc_make_sid_security_cfg(DLA0RDA),
84 	mc_make_sid_security_cfg(DLA0FALRDB),
85 	mc_make_sid_security_cfg(DLA0WRA),
86 	mc_make_sid_security_cfg(DLA0FALWRB),
87 	mc_make_sid_security_cfg(DLA1RDA),
88 	mc_make_sid_security_cfg(DLA1FALRDB),
89 	mc_make_sid_security_cfg(DLA1WRA),
90 	mc_make_sid_security_cfg(DLA1FALWRB),
91 	mc_make_sid_security_cfg(PVA0RDA),
92 	mc_make_sid_security_cfg(PVA0RDB),
93 	mc_make_sid_security_cfg(PVA0RDC),
94 	mc_make_sid_security_cfg(PVA0WRA),
95 	mc_make_sid_security_cfg(PVA0WRB),
96 	mc_make_sid_security_cfg(PVA0WRC),
97 	mc_make_sid_security_cfg(PVA1RDA),
98 	mc_make_sid_security_cfg(PVA1RDB),
99 	mc_make_sid_security_cfg(PVA1RDC),
100 	mc_make_sid_security_cfg(PVA1WRA),
101 	mc_make_sid_security_cfg(PVA1WRB),
102 	mc_make_sid_security_cfg(PVA1WRC),
103 	mc_make_sid_security_cfg(RCER),
104 	mc_make_sid_security_cfg(RCEW),
105 	mc_make_sid_security_cfg(RCEDMAR),
106 	mc_make_sid_security_cfg(RCEDMAW),
107 	mc_make_sid_security_cfg(NVENC1SRD),
108 	mc_make_sid_security_cfg(NVENC1SWR),
109 	mc_make_sid_security_cfg(PCIE0R),
110 	mc_make_sid_security_cfg(PCIE0W),
111 	mc_make_sid_security_cfg(PCIE1R),
112 	mc_make_sid_security_cfg(PCIE1W),
113 	mc_make_sid_security_cfg(PCIE2AR),
114 	mc_make_sid_security_cfg(PCIE2AW),
115 	mc_make_sid_security_cfg(PCIE3R),
116 	mc_make_sid_security_cfg(PCIE3W),
117 	mc_make_sid_security_cfg(PCIE4R),
118 	mc_make_sid_security_cfg(PCIE4W),
119 	mc_make_sid_security_cfg(PCIE5R),
120 	mc_make_sid_security_cfg(PCIE5W),
121 	mc_make_sid_security_cfg(ISPFALW),
122 	mc_make_sid_security_cfg(DLA0RDA1),
123 	mc_make_sid_security_cfg(DLA1RDA1),
124 	mc_make_sid_security_cfg(PVA0RDA1),
125 	mc_make_sid_security_cfg(PVA0RDB1),
126 	mc_make_sid_security_cfg(PVA1RDA1),
127 	mc_make_sid_security_cfg(PVA1RDB1),
128 	mc_make_sid_security_cfg(PCIE5R1),
129 	mc_make_sid_security_cfg(NVENCSRD1),
130 	mc_make_sid_security_cfg(NVENC1SRD1),
131 	mc_make_sid_security_cfg(ISPRA1),
132 	mc_make_sid_security_cfg(MIU0R),
133 	mc_make_sid_security_cfg(MIU0W),
134 	mc_make_sid_security_cfg(MIU1R),
135 	mc_make_sid_security_cfg(MIU1W),
136 	mc_make_sid_security_cfg(MIU2R),
137 	mc_make_sid_security_cfg(MIU2W),
138 	mc_make_sid_security_cfg(MIU3R),
139 	mc_make_sid_security_cfg(MIU3W),
140 	mc_make_sid_override_cfg(HDAR),
141 	mc_make_sid_override_cfg(HOST1XDMAR),
142 	mc_make_sid_override_cfg(NVENCSRD),
143 	mc_make_sid_override_cfg(SATAR),
144 	mc_make_sid_override_cfg(NVENCSWR),
145 	mc_make_sid_override_cfg(HDAW),
146 	mc_make_sid_override_cfg(SATAW),
147 	mc_make_sid_override_cfg(ISPRA),
148 	mc_make_sid_override_cfg(ISPFALR),
149 	mc_make_sid_override_cfg(ISPWA),
150 	mc_make_sid_override_cfg(ISPWB),
151 	mc_make_sid_override_cfg(XUSB_HOSTR),
152 	mc_make_sid_override_cfg(XUSB_HOSTW),
153 	mc_make_sid_override_cfg(XUSB_DEVR),
154 	mc_make_sid_override_cfg(XUSB_DEVW),
155 	mc_make_sid_override_cfg(TSECSRD),
156 	mc_make_sid_override_cfg(TSECSWR),
157 	mc_make_sid_override_cfg(SDMMCRA),
158 	mc_make_sid_override_cfg(SDMMCR),
159 	mc_make_sid_override_cfg(SDMMCRAB),
160 	mc_make_sid_override_cfg(SDMMCWA),
161 	mc_make_sid_override_cfg(SDMMCW),
162 	mc_make_sid_override_cfg(SDMMCWAB),
163 	mc_make_sid_override_cfg(VICSRD),
164 	mc_make_sid_override_cfg(VICSWR),
165 	mc_make_sid_override_cfg(VIW),
166 	mc_make_sid_override_cfg(NVDECSRD),
167 	mc_make_sid_override_cfg(NVDECSWR),
168 	mc_make_sid_override_cfg(APER),
169 	mc_make_sid_override_cfg(APEW),
170 	mc_make_sid_override_cfg(NVJPGSRD),
171 	mc_make_sid_override_cfg(NVJPGSWR),
172 	mc_make_sid_override_cfg(SESRD),
173 	mc_make_sid_override_cfg(SESWR),
174 	mc_make_sid_override_cfg(AXIAPR),
175 	mc_make_sid_override_cfg(AXIAPW),
176 	mc_make_sid_override_cfg(ETRR),
177 	mc_make_sid_override_cfg(ETRW),
178 	mc_make_sid_override_cfg(TSECSRDB),
179 	mc_make_sid_override_cfg(TSECSWRB),
180 	mc_make_sid_override_cfg(AXISR),
181 	mc_make_sid_override_cfg(AXISW),
182 	mc_make_sid_override_cfg(EQOSR),
183 	mc_make_sid_override_cfg(EQOSW),
184 	mc_make_sid_override_cfg(UFSHCR),
185 	mc_make_sid_override_cfg(UFSHCW),
186 	mc_make_sid_override_cfg(NVDISPLAYR),
187 	mc_make_sid_override_cfg(BPMPR),
188 	mc_make_sid_override_cfg(BPMPW),
189 	mc_make_sid_override_cfg(BPMPDMAR),
190 	mc_make_sid_override_cfg(BPMPDMAW),
191 	mc_make_sid_override_cfg(AONR),
192 	mc_make_sid_override_cfg(AONW),
193 	mc_make_sid_override_cfg(AONDMAR),
194 	mc_make_sid_override_cfg(AONDMAW),
195 	mc_make_sid_override_cfg(SCER),
196 	mc_make_sid_override_cfg(SCEW),
197 	mc_make_sid_override_cfg(SCEDMAR),
198 	mc_make_sid_override_cfg(SCEDMAW),
199 	mc_make_sid_override_cfg(APEDMAR),
200 	mc_make_sid_override_cfg(APEDMAW),
201 	mc_make_sid_override_cfg(NVDISPLAYR1),
202 	mc_make_sid_override_cfg(VICSRD1),
203 	mc_make_sid_override_cfg(NVDECSRD1),
204 	mc_make_sid_override_cfg(VIFALR),
205 	mc_make_sid_override_cfg(VIFALW),
206 	mc_make_sid_override_cfg(DLA0RDA),
207 	mc_make_sid_override_cfg(DLA0FALRDB),
208 	mc_make_sid_override_cfg(DLA0WRA),
209 	mc_make_sid_override_cfg(DLA0FALWRB),
210 	mc_make_sid_override_cfg(DLA1RDA),
211 	mc_make_sid_override_cfg(DLA1FALRDB),
212 	mc_make_sid_override_cfg(DLA1WRA),
213 	mc_make_sid_override_cfg(DLA1FALWRB),
214 	mc_make_sid_override_cfg(PVA0RDA),
215 	mc_make_sid_override_cfg(PVA0RDB),
216 	mc_make_sid_override_cfg(PVA0RDC),
217 	mc_make_sid_override_cfg(PVA0WRA),
218 	mc_make_sid_override_cfg(PVA0WRB),
219 	mc_make_sid_override_cfg(PVA0WRC),
220 	mc_make_sid_override_cfg(PVA1RDA),
221 	mc_make_sid_override_cfg(PVA1RDB),
222 	mc_make_sid_override_cfg(PVA1RDC),
223 	mc_make_sid_override_cfg(PVA1WRA),
224 	mc_make_sid_override_cfg(PVA1WRB),
225 	mc_make_sid_override_cfg(PVA1WRC),
226 	mc_make_sid_override_cfg(RCER),
227 	mc_make_sid_override_cfg(RCEW),
228 	mc_make_sid_override_cfg(RCEDMAR),
229 	mc_make_sid_override_cfg(RCEDMAW),
230 	mc_make_sid_override_cfg(NVENC1SRD),
231 	mc_make_sid_override_cfg(NVENC1SWR),
232 	mc_make_sid_override_cfg(PCIE0R),
233 	mc_make_sid_override_cfg(PCIE0W),
234 	mc_make_sid_override_cfg(PCIE1R),
235 	mc_make_sid_override_cfg(PCIE1W),
236 	mc_make_sid_override_cfg(PCIE2AR),
237 	mc_make_sid_override_cfg(PCIE2AW),
238 	mc_make_sid_override_cfg(PCIE3R),
239 	mc_make_sid_override_cfg(PCIE3W),
240 	mc_make_sid_override_cfg(PCIE4R),
241 	mc_make_sid_override_cfg(PCIE4W),
242 	mc_make_sid_override_cfg(PCIE5R),
243 	mc_make_sid_override_cfg(PCIE5W),
244 	mc_make_sid_override_cfg(ISPFALW),
245 	mc_make_sid_override_cfg(DLA0RDA1),
246 	mc_make_sid_override_cfg(DLA1RDA1),
247 	mc_make_sid_override_cfg(PVA0RDA1),
248 	mc_make_sid_override_cfg(PVA0RDB1),
249 	mc_make_sid_override_cfg(PVA1RDA1),
250 	mc_make_sid_override_cfg(PVA1RDB1),
251 	mc_make_sid_override_cfg(PCIE5R1),
252 	mc_make_sid_override_cfg(NVENCSRD1),
253 	mc_make_sid_override_cfg(NVENC1SRD1),
254 	mc_make_sid_override_cfg(ISPRA1),
255 	mc_make_sid_override_cfg(MIU0R),
256 	mc_make_sid_override_cfg(MIU0W),
257 	mc_make_sid_override_cfg(MIU1R),
258 	mc_make_sid_override_cfg(MIU1W),
259 	mc_make_sid_override_cfg(MIU2R),
260 	mc_make_sid_override_cfg(MIU2W),
261 	mc_make_sid_override_cfg(MIU3R),
262 	mc_make_sid_override_cfg(MIU3W),
263 	smmu_make_gnsr0_nsec_cfg(CR0),
264 	smmu_make_gnsr0_sec_cfg(IDR0),
265 	smmu_make_gnsr0_sec_cfg(IDR1),
266 	smmu_make_gnsr0_sec_cfg(IDR2),
267 	smmu_make_gnsr0_nsec_cfg(GFSR),
268 	smmu_make_gnsr0_nsec_cfg(GFSYNR0),
269 	smmu_make_gnsr0_nsec_cfg(GFSYNR1),
270 	smmu_make_gnsr0_nsec_cfg(TLBGSTATUS),
271 	smmu_make_gnsr0_nsec_cfg(PIDR2),
272 	smmu_make_smrg_group(0),
273 	smmu_make_smrg_group(1),
274 	smmu_make_smrg_group(2),
275 	smmu_make_smrg_group(3),
276 	smmu_make_smrg_group(4),
277 	smmu_make_smrg_group(5),
278 	smmu_make_smrg_group(6),
279 	smmu_make_smrg_group(7),
280 	smmu_make_smrg_group(8),
281 	smmu_make_smrg_group(9),
282 	smmu_make_smrg_group(10),
283 	smmu_make_smrg_group(11),
284 	smmu_make_smrg_group(12),
285 	smmu_make_smrg_group(13),
286 	smmu_make_smrg_group(14),
287 	smmu_make_smrg_group(15),
288 	smmu_make_smrg_group(16),
289 	smmu_make_smrg_group(17),
290 	smmu_make_smrg_group(18),
291 	smmu_make_smrg_group(19),
292 	smmu_make_smrg_group(20),
293 	smmu_make_smrg_group(21),
294 	smmu_make_smrg_group(22),
295 	smmu_make_smrg_group(23),
296 	smmu_make_smrg_group(24),
297 	smmu_make_smrg_group(25),
298 	smmu_make_smrg_group(26),
299 	smmu_make_smrg_group(27),
300 	smmu_make_smrg_group(28),
301 	smmu_make_smrg_group(29),
302 	smmu_make_smrg_group(30),
303 	smmu_make_smrg_group(31),
304 	smmu_make_smrg_group(32),
305 	smmu_make_smrg_group(33),
306 	smmu_make_smrg_group(34),
307 	smmu_make_smrg_group(35),
308 	smmu_make_smrg_group(36),
309 	smmu_make_smrg_group(37),
310 	smmu_make_smrg_group(38),
311 	smmu_make_smrg_group(39),
312 	smmu_make_smrg_group(40),
313 	smmu_make_smrg_group(41),
314 	smmu_make_smrg_group(42),
315 	smmu_make_smrg_group(43),
316 	smmu_make_smrg_group(44),
317 	smmu_make_smrg_group(45),
318 	smmu_make_smrg_group(46),
319 	smmu_make_smrg_group(47),
320 	smmu_make_smrg_group(48),
321 	smmu_make_smrg_group(49),
322 	smmu_make_smrg_group(50),
323 	smmu_make_smrg_group(51),
324 	smmu_make_smrg_group(52),
325 	smmu_make_smrg_group(53),
326 	smmu_make_smrg_group(54),
327 	smmu_make_smrg_group(55),
328 	smmu_make_smrg_group(56),
329 	smmu_make_smrg_group(57),
330 	smmu_make_smrg_group(58),
331 	smmu_make_smrg_group(59),
332 	smmu_make_smrg_group(60),
333 	smmu_make_smrg_group(61),
334 	smmu_make_smrg_group(62),
335 	smmu_make_smrg_group(63),
336 	smmu_make_cb_group(0),
337 	smmu_make_cb_group(1),
338 	smmu_make_cb_group(2),
339 	smmu_make_cb_group(3),
340 	smmu_make_cb_group(4),
341 	smmu_make_cb_group(5),
342 	smmu_make_cb_group(6),
343 	smmu_make_cb_group(7),
344 	smmu_make_cb_group(8),
345 	smmu_make_cb_group(9),
346 	smmu_make_cb_group(10),
347 	smmu_make_cb_group(11),
348 	smmu_make_cb_group(12),
349 	smmu_make_cb_group(13),
350 	smmu_make_cb_group(14),
351 	smmu_make_cb_group(15),
352 	smmu_make_cb_group(16),
353 	smmu_make_cb_group(17),
354 	smmu_make_cb_group(18),
355 	smmu_make_cb_group(19),
356 	smmu_make_cb_group(20),
357 	smmu_make_cb_group(21),
358 	smmu_make_cb_group(22),
359 	smmu_make_cb_group(23),
360 	smmu_make_cb_group(24),
361 	smmu_make_cb_group(25),
362 	smmu_make_cb_group(26),
363 	smmu_make_cb_group(27),
364 	smmu_make_cb_group(28),
365 	smmu_make_cb_group(29),
366 	smmu_make_cb_group(30),
367 	smmu_make_cb_group(31),
368 	smmu_make_cb_group(32),
369 	smmu_make_cb_group(33),
370 	smmu_make_cb_group(34),
371 	smmu_make_cb_group(35),
372 	smmu_make_cb_group(36),
373 	smmu_make_cb_group(37),
374 	smmu_make_cb_group(38),
375 	smmu_make_cb_group(39),
376 	smmu_make_cb_group(40),
377 	smmu_make_cb_group(41),
378 	smmu_make_cb_group(42),
379 	smmu_make_cb_group(43),
380 	smmu_make_cb_group(44),
381 	smmu_make_cb_group(45),
382 	smmu_make_cb_group(46),
383 	smmu_make_cb_group(47),
384 	smmu_make_cb_group(48),
385 	smmu_make_cb_group(49),
386 	smmu_make_cb_group(50),
387 	smmu_make_cb_group(51),
388 	smmu_make_cb_group(52),
389 	smmu_make_cb_group(53),
390 	smmu_make_cb_group(54),
391 	smmu_make_cb_group(55),
392 	smmu_make_cb_group(56),
393 	smmu_make_cb_group(57),
394 	smmu_make_cb_group(58),
395 	smmu_make_cb_group(59),
396 	smmu_make_cb_group(60),
397 	smmu_make_cb_group(61),
398 	smmu_make_cb_group(62),
399 	smmu_make_cb_group(63),
400 	smmu_bypass_cfg,	/* TBU settings */
401 	_END_OF_TABLE_,
402 };
403 
404 /*******************************************************************************
405  * Handler to return the pointer to the SMMU's context struct
406  ******************************************************************************/
407 smmu_regs_t *plat_get_smmu_ctx(void)
408 {
409 	/* index of _END_OF_TABLE_ */
410 	tegra194_smmu_context[0].val = ARRAY_SIZE(tegra194_smmu_context) - 1;
411 
412 	return tegra194_smmu_context;
413 }
414