13cf3183fSVarun Wadekar /* 293c78ed2SAntonio Nino Diaz * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 33cf3183fSVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 53cf3183fSVarun Wadekar */ 63cf3183fSVarun Wadekar 768c7de6fSVarun Wadekar #include <string.h> 809d40e0eSAntonio Nino Diaz 909d40e0eSAntonio Nino Diaz #include <arch_helpers.h> 1009d40e0eSAntonio Nino Diaz #include <common/debug.h> 1109d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 1209d40e0eSAntonio Nino Diaz 1309d40e0eSAntonio Nino Diaz #include <mce.h> 14b47d97b3SVarun Wadekar #include <tegra_def.h> 1568c7de6fSVarun Wadekar #include <tegra_private.h> 16b47d97b3SVarun Wadekar 17*592035d0SAnthony Zhou #define MISCREG_AA64_RST_LOW 0x2004U 18*592035d0SAnthony Zhou #define MISCREG_AA64_RST_HIGH 0x2008U 19b47d97b3SVarun Wadekar 20*592035d0SAnthony Zhou #define SCRATCH_SECURE_RSV1_SCRATCH_0 0x658U 21*592035d0SAnthony Zhou #define SCRATCH_SECURE_RSV1_SCRATCH_1 0x65CU 22b47d97b3SVarun Wadekar 23*592035d0SAnthony Zhou #define CPU_RESET_MODE_AA64 1U 24b47d97b3SVarun Wadekar 2593c78ed2SAntonio Nino Diaz extern void memcpy16(void *dest, const void *src, unsigned int length); 2693c78ed2SAntonio Nino Diaz 2768c7de6fSVarun Wadekar extern uint64_t tegra_bl31_phys_base; 2868c7de6fSVarun Wadekar extern uint64_t __tegra186_cpu_reset_handler_end; 29b47d97b3SVarun Wadekar 303cf3183fSVarun Wadekar /******************************************************************************* 313cf3183fSVarun Wadekar * Setup secondary CPU vectors 323cf3183fSVarun Wadekar ******************************************************************************/ 333cf3183fSVarun Wadekar void plat_secondary_setup(void) 343cf3183fSVarun Wadekar { 35b47d97b3SVarun Wadekar uint32_t addr_low, addr_high; 36*592035d0SAnthony Zhou const plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); 3768c7de6fSVarun Wadekar uint64_t cpu_reset_handler_base; 38b47d97b3SVarun Wadekar 39b47d97b3SVarun Wadekar INFO("Setting up secondary CPU boot\n"); 40b47d97b3SVarun Wadekar 4168c7de6fSVarun Wadekar if ((tegra_bl31_phys_base >= TEGRA_TZRAM_BASE) && 4268c7de6fSVarun Wadekar (tegra_bl31_phys_base <= (TEGRA_TZRAM_BASE + TEGRA_TZRAM_SIZE))) { 4368c7de6fSVarun Wadekar 4468c7de6fSVarun Wadekar /* 4568c7de6fSVarun Wadekar * The BL31 code resides in the TZSRAM which loses state 4668c7de6fSVarun Wadekar * when we enter System Suspend. Copy the wakeup trampoline 4768c7de6fSVarun Wadekar * code to TZDRAM to help us exit from System Suspend. 4868c7de6fSVarun Wadekar */ 4968c7de6fSVarun Wadekar cpu_reset_handler_base = params_from_bl2->tzdram_base; 5068c7de6fSVarun Wadekar memcpy16((void *)((uintptr_t)cpu_reset_handler_base), 5168c7de6fSVarun Wadekar (void *)(uintptr_t)tegra186_cpu_reset_handler, 5268c7de6fSVarun Wadekar (uintptr_t)&__tegra186_cpu_reset_handler_end - 5368c7de6fSVarun Wadekar (uintptr_t)tegra186_cpu_reset_handler); 5468c7de6fSVarun Wadekar 5568c7de6fSVarun Wadekar } else { 5668c7de6fSVarun Wadekar cpu_reset_handler_base = (uintptr_t)tegra_secure_entrypoint; 5768c7de6fSVarun Wadekar } 5868c7de6fSVarun Wadekar 5968c7de6fSVarun Wadekar addr_low = (uint32_t)cpu_reset_handler_base | CPU_RESET_MODE_AA64; 60*592035d0SAnthony Zhou addr_high = (uint32_t)((cpu_reset_handler_base >> 32U) & 0x7ffU); 61b47d97b3SVarun Wadekar 62b47d97b3SVarun Wadekar /* write lower 32 bits first, then the upper 11 bits */ 63b47d97b3SVarun Wadekar mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_LOW, addr_low); 64b47d97b3SVarun Wadekar mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_HIGH, addr_high); 65b47d97b3SVarun Wadekar 66b47d97b3SVarun Wadekar /* save reset vector to be used during SYSTEM_SUSPEND exit */ 67b47d97b3SVarun Wadekar mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_SECURE_RSV1_SCRATCH_0, 68b47d97b3SVarun Wadekar addr_low); 69b47d97b3SVarun Wadekar mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_SECURE_RSV1_SCRATCH_1, 70b47d97b3SVarun Wadekar addr_high); 71b47d97b3SVarun Wadekar 72b47d97b3SVarun Wadekar /* update reset vector address to the CCPLEX */ 73*592035d0SAnthony Zhou (void)mce_update_reset_vector(); 743cf3183fSVarun Wadekar } 75