xref: /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/plat_memctrl.c (revision b10d44995eb652675863c2cc6a7726683613da0d)
1 /*
2  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <bl_common.h>
32 #include <memctrl_v2.h>
33 
34 /*******************************************************************************
35  * Array to hold stream_id override config register offsets
36  ******************************************************************************/
37 const static uint32_t tegra186_streamid_override_regs[] = {
38 	MC_STREAMID_OVERRIDE_CFG_PTCR,
39 	MC_STREAMID_OVERRIDE_CFG_AFIR,
40 	MC_STREAMID_OVERRIDE_CFG_HDAR,
41 	MC_STREAMID_OVERRIDE_CFG_HOST1XDMAR,
42 	MC_STREAMID_OVERRIDE_CFG_NVENCSRD,
43 	MC_STREAMID_OVERRIDE_CFG_SATAR,
44 	MC_STREAMID_OVERRIDE_CFG_MPCORER,
45 	MC_STREAMID_OVERRIDE_CFG_NVENCSWR,
46 	MC_STREAMID_OVERRIDE_CFG_AFIW,
47 	MC_STREAMID_OVERRIDE_CFG_HDAW,
48 	MC_STREAMID_OVERRIDE_CFG_MPCOREW,
49 	MC_STREAMID_OVERRIDE_CFG_SATAW,
50 	MC_STREAMID_OVERRIDE_CFG_ISPRA,
51 	MC_STREAMID_OVERRIDE_CFG_ISPWA,
52 	MC_STREAMID_OVERRIDE_CFG_ISPWB,
53 	MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTR,
54 	MC_STREAMID_OVERRIDE_CFG_XUSB_HOSTW,
55 	MC_STREAMID_OVERRIDE_CFG_XUSB_DEVR,
56 	MC_STREAMID_OVERRIDE_CFG_XUSB_DEVW,
57 	MC_STREAMID_OVERRIDE_CFG_TSECSRD,
58 	MC_STREAMID_OVERRIDE_CFG_TSECSWR,
59 	MC_STREAMID_OVERRIDE_CFG_GPUSRD,
60 	MC_STREAMID_OVERRIDE_CFG_GPUSWR,
61 	MC_STREAMID_OVERRIDE_CFG_SDMMCRA,
62 	MC_STREAMID_OVERRIDE_CFG_SDMMCRAA,
63 	MC_STREAMID_OVERRIDE_CFG_SDMMCR,
64 	MC_STREAMID_OVERRIDE_CFG_SDMMCRAB,
65 	MC_STREAMID_OVERRIDE_CFG_SDMMCWA,
66 	MC_STREAMID_OVERRIDE_CFG_SDMMCWAA,
67 	MC_STREAMID_OVERRIDE_CFG_SDMMCW,
68 	MC_STREAMID_OVERRIDE_CFG_SDMMCWAB,
69 	MC_STREAMID_OVERRIDE_CFG_VICSRD,
70 	MC_STREAMID_OVERRIDE_CFG_VICSWR,
71 	MC_STREAMID_OVERRIDE_CFG_VIW,
72 	MC_STREAMID_OVERRIDE_CFG_NVDECSRD,
73 	MC_STREAMID_OVERRIDE_CFG_NVDECSWR,
74 	MC_STREAMID_OVERRIDE_CFG_APER,
75 	MC_STREAMID_OVERRIDE_CFG_APEW,
76 	MC_STREAMID_OVERRIDE_CFG_NVJPGSRD,
77 	MC_STREAMID_OVERRIDE_CFG_NVJPGSWR,
78 	MC_STREAMID_OVERRIDE_CFG_SESRD,
79 	MC_STREAMID_OVERRIDE_CFG_SESWR,
80 	MC_STREAMID_OVERRIDE_CFG_ETRR,
81 	MC_STREAMID_OVERRIDE_CFG_ETRW,
82 	MC_STREAMID_OVERRIDE_CFG_TSECSRDB,
83 	MC_STREAMID_OVERRIDE_CFG_TSECSWRB,
84 	MC_STREAMID_OVERRIDE_CFG_GPUSRD2,
85 	MC_STREAMID_OVERRIDE_CFG_GPUSWR2,
86 	MC_STREAMID_OVERRIDE_CFG_AXISR,
87 	MC_STREAMID_OVERRIDE_CFG_AXISW,
88 	MC_STREAMID_OVERRIDE_CFG_EQOSR,
89 	MC_STREAMID_OVERRIDE_CFG_EQOSW,
90 	MC_STREAMID_OVERRIDE_CFG_UFSHCR,
91 	MC_STREAMID_OVERRIDE_CFG_UFSHCW,
92 	MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR,
93 	MC_STREAMID_OVERRIDE_CFG_BPMPR,
94 	MC_STREAMID_OVERRIDE_CFG_BPMPW,
95 	MC_STREAMID_OVERRIDE_CFG_BPMPDMAR,
96 	MC_STREAMID_OVERRIDE_CFG_BPMPDMAW,
97 	MC_STREAMID_OVERRIDE_CFG_AONR,
98 	MC_STREAMID_OVERRIDE_CFG_AONW,
99 	MC_STREAMID_OVERRIDE_CFG_AONDMAR,
100 	MC_STREAMID_OVERRIDE_CFG_AONDMAW,
101 	MC_STREAMID_OVERRIDE_CFG_SCER,
102 	MC_STREAMID_OVERRIDE_CFG_SCEW,
103 	MC_STREAMID_OVERRIDE_CFG_SCEDMAR,
104 	MC_STREAMID_OVERRIDE_CFG_SCEDMAW,
105 	MC_STREAMID_OVERRIDE_CFG_APEDMAR,
106 	MC_STREAMID_OVERRIDE_CFG_APEDMAW,
107 	MC_STREAMID_OVERRIDE_CFG_NVDISPLAYR1,
108 	MC_STREAMID_OVERRIDE_CFG_VICSRD1,
109 	MC_STREAMID_OVERRIDE_CFG_NVDECSRD1
110 };
111 
112 /*******************************************************************************
113  * Array to hold the security configs for stream IDs
114  ******************************************************************************/
115 const static mc_streamid_security_cfg_t tegra186_streamid_sec_cfgs[] = {
116 	mc_make_sec_cfg(SCEW, NON_SECURE, NO_OVERRIDE, ENABLE),
117 	mc_make_sec_cfg(AFIR, NON_SECURE, OVERRIDE, ENABLE),
118 	mc_make_sec_cfg(AFIW, NON_SECURE, OVERRIDE, ENABLE),
119 	mc_make_sec_cfg(NVDISPLAYR1, NON_SECURE, OVERRIDE, ENABLE),
120 	mc_make_sec_cfg(XUSB_DEVR, NON_SECURE, OVERRIDE, ENABLE),
121 	mc_make_sec_cfg(VICSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
122 	mc_make_sec_cfg(NVENCSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
123 	mc_make_sec_cfg(TSECSRDB, NON_SECURE, NO_OVERRIDE, ENABLE),
124 	mc_make_sec_cfg(AXISW, SECURE, NO_OVERRIDE, DISABLE),
125 	mc_make_sec_cfg(SDMMCWAB, NON_SECURE, OVERRIDE, ENABLE),
126 	mc_make_sec_cfg(AONDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
127 	mc_make_sec_cfg(GPUSWR2, SECURE, NO_OVERRIDE, DISABLE),
128 	mc_make_sec_cfg(SATAW, NON_SECURE, OVERRIDE, ENABLE),
129 	mc_make_sec_cfg(UFSHCW, NON_SECURE, OVERRIDE, ENABLE),
130 	mc_make_sec_cfg(SDMMCR, NON_SECURE, OVERRIDE, ENABLE),
131 	mc_make_sec_cfg(SCEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
132 	mc_make_sec_cfg(UFSHCR, NON_SECURE, OVERRIDE, ENABLE),
133 	mc_make_sec_cfg(SDMMCWAA, NON_SECURE, OVERRIDE, ENABLE),
134 	mc_make_sec_cfg(SESWR, NON_SECURE, NO_OVERRIDE, ENABLE),
135 	mc_make_sec_cfg(MPCORER, NON_SECURE, OVERRIDE, ENABLE),
136 	mc_make_sec_cfg(PTCR, NON_SECURE, OVERRIDE, ENABLE),
137 	mc_make_sec_cfg(BPMPW, NON_SECURE, NO_OVERRIDE, ENABLE),
138 	mc_make_sec_cfg(ETRW, NON_SECURE, OVERRIDE, ENABLE),
139 	mc_make_sec_cfg(GPUSRD, SECURE, NO_OVERRIDE, DISABLE),
140 	mc_make_sec_cfg(VICSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
141 	mc_make_sec_cfg(SCEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
142 	mc_make_sec_cfg(HDAW, NON_SECURE, OVERRIDE, ENABLE),
143 	mc_make_sec_cfg(ISPWA, NON_SECURE, OVERRIDE, ENABLE),
144 	mc_make_sec_cfg(EQOSW, NON_SECURE, OVERRIDE, ENABLE),
145 	mc_make_sec_cfg(XUSB_HOSTW, NON_SECURE, OVERRIDE, ENABLE),
146 	mc_make_sec_cfg(TSECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
147 	mc_make_sec_cfg(SDMMCRAA, NON_SECURE, OVERRIDE, ENABLE),
148 	mc_make_sec_cfg(VIW, NON_SECURE, OVERRIDE, ENABLE),
149 	mc_make_sec_cfg(AXISR, SECURE, NO_OVERRIDE, DISABLE),
150 	mc_make_sec_cfg(SDMMCW, NON_SECURE, OVERRIDE, ENABLE),
151 	mc_make_sec_cfg(BPMPDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
152 	mc_make_sec_cfg(ISPRA, NON_SECURE, OVERRIDE, ENABLE),
153 	mc_make_sec_cfg(NVDECSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
154 	mc_make_sec_cfg(XUSB_DEVW, NON_SECURE, OVERRIDE, ENABLE),
155 	mc_make_sec_cfg(NVDECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
156 	mc_make_sec_cfg(MPCOREW, NON_SECURE, OVERRIDE, ENABLE),
157 	mc_make_sec_cfg(NVDISPLAYR, NON_SECURE, OVERRIDE, ENABLE),
158 	mc_make_sec_cfg(BPMPDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
159 	mc_make_sec_cfg(NVJPGSWR, NON_SECURE, NO_OVERRIDE, ENABLE),
160 	mc_make_sec_cfg(NVDECSRD1, NON_SECURE, NO_OVERRIDE, ENABLE),
161 	mc_make_sec_cfg(TSECSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
162 	mc_make_sec_cfg(NVJPGSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
163 	mc_make_sec_cfg(SDMMCWA, NON_SECURE, OVERRIDE, ENABLE),
164 	mc_make_sec_cfg(SCER, NON_SECURE, NO_OVERRIDE, ENABLE),
165 	mc_make_sec_cfg(XUSB_HOSTR, NON_SECURE, OVERRIDE, ENABLE),
166 	mc_make_sec_cfg(VICSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
167 	mc_make_sec_cfg(AONDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
168 	mc_make_sec_cfg(AONW, NON_SECURE, NO_OVERRIDE, ENABLE),
169 	mc_make_sec_cfg(SDMMCRA, NON_SECURE, OVERRIDE, ENABLE),
170 	mc_make_sec_cfg(HOST1XDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
171 	mc_make_sec_cfg(EQOSR, NON_SECURE, OVERRIDE, ENABLE),
172 	mc_make_sec_cfg(SATAR, NON_SECURE, OVERRIDE, ENABLE),
173 	mc_make_sec_cfg(BPMPR, NON_SECURE, NO_OVERRIDE, ENABLE),
174 	mc_make_sec_cfg(HDAR, NON_SECURE, OVERRIDE, ENABLE),
175 	mc_make_sec_cfg(SDMMCRAB, NON_SECURE, OVERRIDE, ENABLE),
176 	mc_make_sec_cfg(ETRR, NON_SECURE, OVERRIDE, ENABLE),
177 	mc_make_sec_cfg(AONR, NON_SECURE, NO_OVERRIDE, ENABLE),
178 	mc_make_sec_cfg(SESRD, NON_SECURE, NO_OVERRIDE, ENABLE),
179 	mc_make_sec_cfg(NVENCSRD, NON_SECURE, NO_OVERRIDE, ENABLE),
180 	mc_make_sec_cfg(GPUSWR, SECURE, NO_OVERRIDE, DISABLE),
181 	mc_make_sec_cfg(TSECSWRB, NON_SECURE, NO_OVERRIDE, ENABLE),
182 	mc_make_sec_cfg(ISPWB, NON_SECURE, OVERRIDE, ENABLE),
183 	mc_make_sec_cfg(GPUSRD2, SECURE, NO_OVERRIDE, DISABLE),
184 	mc_make_sec_cfg(APEDMAW, NON_SECURE, NO_OVERRIDE, ENABLE),
185 	mc_make_sec_cfg(APER, NON_SECURE, NO_OVERRIDE, ENABLE),
186 	mc_make_sec_cfg(APEW, NON_SECURE, NO_OVERRIDE, ENABLE),
187 	mc_make_sec_cfg(APEDMAR, NON_SECURE, NO_OVERRIDE, ENABLE),
188 };
189 
190 /*******************************************************************************
191  * Array to hold the transaction override configs
192  ******************************************************************************/
193 const static mc_txn_override_cfg_t tegra186_txn_override_cfgs[] = {
194 	mc_make_txn_override_cfg(BPMPW, CGID_TAG_ADR),
195 	mc_make_txn_override_cfg(EQOSW, CGID_TAG_ADR),
196 	mc_make_txn_override_cfg(NVJPGSWR, CGID_TAG_ADR),
197 	mc_make_txn_override_cfg(SDMMCWAA, CGID_TAG_ADR),
198 	mc_make_txn_override_cfg(MPCOREW, CGID_TAG_ADR),
199 	mc_make_txn_override_cfg(SCEDMAW, CGID_TAG_ADR),
200 	mc_make_txn_override_cfg(SDMMCW, CGID_TAG_ADR),
201 	mc_make_txn_override_cfg(AXISW, CGID_TAG_ADR),
202 	mc_make_txn_override_cfg(TSECSWR, CGID_TAG_ADR),
203 	mc_make_txn_override_cfg(GPUSWR, CGID_TAG_ADR),
204 	mc_make_txn_override_cfg(XUSB_HOSTW, CGID_TAG_ADR),
205 	mc_make_txn_override_cfg(TSECSWRB, CGID_TAG_ADR),
206 	mc_make_txn_override_cfg(GPUSWR2, CGID_TAG_ADR),
207 	mc_make_txn_override_cfg(AONDMAW, CGID_TAG_ADR),
208 	mc_make_txn_override_cfg(AONW, CGID_TAG_ADR),
209 	mc_make_txn_override_cfg(SESWR, CGID_TAG_ADR),
210 	mc_make_txn_override_cfg(BPMPDMAW, CGID_TAG_ADR),
211 	mc_make_txn_override_cfg(SDMMCWA, CGID_TAG_ADR),
212 	mc_make_txn_override_cfg(HDAW, CGID_TAG_ADR),
213 	mc_make_txn_override_cfg(NVDECSWR, CGID_TAG_ADR),
214 	mc_make_txn_override_cfg(UFSHCW, CGID_TAG_ADR),
215 	mc_make_txn_override_cfg(SATAW, CGID_TAG_ADR),
216 	mc_make_txn_override_cfg(ETRW, CGID_TAG_ADR),
217 	mc_make_txn_override_cfg(VICSWR, CGID_TAG_ADR),
218 	mc_make_txn_override_cfg(NVENCSWR, CGID_TAG_ADR),
219 	mc_make_txn_override_cfg(SDMMCWAB, CGID_TAG_ADR),
220 	mc_make_txn_override_cfg(ISPWB, CGID_TAG_ADR),
221 	mc_make_txn_override_cfg(APEW, CGID_TAG_ADR),
222 	mc_make_txn_override_cfg(XUSB_DEVW, CGID_TAG_ADR),
223 	mc_make_txn_override_cfg(AFIW, CGID_TAG_ADR),
224 	mc_make_txn_override_cfg(SCEW, CGID_TAG_ADR),
225 };
226 
227 /*******************************************************************************
228  * Struct to hold the memory controller settings
229  ******************************************************************************/
230 static tegra_mc_settings_t tegra186_mc_settings = {
231 	.streamid_override_cfg = tegra186_streamid_override_regs,
232 	.num_streamid_override_cfgs = ARRAY_SIZE(tegra186_streamid_override_regs),
233 	.streamid_security_cfg = tegra186_streamid_sec_cfgs,
234 	.num_streamid_security_cfgs = ARRAY_SIZE(tegra186_streamid_sec_cfgs),
235 	.txn_override_cfg = tegra186_txn_override_cfgs,
236 	.num_txn_override_cfgs = ARRAY_SIZE(tegra186_txn_override_cfgs)
237 };
238 
239 /*******************************************************************************
240  * Handler to return the pointer to the memory controller's settings struct
241  ******************************************************************************/
242 tegra_mc_settings_t *tegra_get_mc_settings(void)
243 {
244 	return &tegra186_mc_settings;
245 }
246