xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/tegra_private.h (revision fd6007de64fd7e16f6d96972643434c04a77f1c6)
1 /*
2  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __TEGRA_PRIVATE_H__
32 #define __TEGRA_PRIVATE_H__
33 
34 #include <xlat_tables.h>
35 #include <platform_def.h>
36 
37 /*******************************************************************************
38  * Tegra DRAM memory base address
39  ******************************************************************************/
40 #define TEGRA_DRAM_BASE		0x80000000
41 #define TEGRA_DRAM_END		0x27FFFFFFF
42 
43 typedef struct plat_params_from_bl2 {
44 	uint64_t tzdram_size;
45 } plat_params_from_bl2_t;
46 
47 /* Declarations for plat_psci_handlers.c */
48 int32_t tegra_soc_validate_power_state(unsigned int power_state);
49 
50 /* Declarations for plat_setup.c */
51 const mmap_region_t *plat_get_mmio_map(void);
52 uint64_t plat_get_syscnt_freq(void);
53 
54 /* Declarations for plat_secondary.c */
55 void plat_secondary_setup(void);
56 int plat_lock_cpu_vectors(void);
57 
58 /* Declarations for tegra_gic.c */
59 void tegra_gic_setup(void);
60 void tegra_gic_cpuif_deactivate(void);
61 
62 /* Declarations for tegra_security.c */
63 void tegra_security_setup(void);
64 void tegra_security_setup_videomem(uintptr_t base, uint64_t size);
65 
66 /* Declarations for tegra_pm.c */
67 void tegra_pm_system_suspend_entry(void);
68 void tegra_pm_system_suspend_exit(void);
69 int tegra_system_suspended(void);
70 
71 /* Declarations for tegraXXX_pm.c */
72 int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl);
73 int tegra_prepare_cpu_on_finish(unsigned long mpidr);
74 
75 /* Declarations for tegra_bl31_setup.c */
76 plat_params_from_bl2_t *bl31_get_plat_params(void);
77 int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes);
78 
79 /* Declarations for tegra_delay_timer.c */
80 void tegra_delay_timer_init(void);
81 
82 #endif /* __TEGRA_PRIVATE_H__ */
83