1 /* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __TEGRA_PRIVATE_H__ 32 #define __TEGRA_PRIVATE_H__ 33 34 #include <arch.h> 35 #include <platform_def.h> 36 #include <psci.h> 37 #include <xlat_tables.h> 38 39 /******************************************************************************* 40 * Tegra DRAM memory base address 41 ******************************************************************************/ 42 #define TEGRA_DRAM_BASE 0x80000000 43 #define TEGRA_DRAM_END 0x27FFFFFFF 44 45 /******************************************************************************* 46 * Struct for parameters received from BL2 47 ******************************************************************************/ 48 typedef struct plat_params_from_bl2 { 49 /* TZ memory size */ 50 uint64_t tzdram_size; 51 /* TZ memory base */ 52 uint64_t tzdram_base; 53 /* UART port ID */ 54 int uart_id; 55 } plat_params_from_bl2_t; 56 57 /******************************************************************************* 58 * Per-CPU struct describing FIQ state to be stored 59 ******************************************************************************/ 60 typedef struct pcpu_fiq_state { 61 uint64_t elr_el3; 62 uint64_t spsr_el3; 63 } pcpu_fiq_state_t; 64 65 /******************************************************************************* 66 * Struct describing per-FIQ configuration settings 67 ******************************************************************************/ 68 typedef struct irq_sec_cfg { 69 /* IRQ number */ 70 unsigned int irq; 71 /* Target CPUs servicing this interrupt */ 72 unsigned int target_cpus; 73 /* type = INTR_TYPE_S_EL1 or INTR_TYPE_EL3 */ 74 uint32_t type; 75 } irq_sec_cfg_t; 76 77 /* Declarations for plat_psci_handlers.c */ 78 int32_t tegra_soc_validate_power_state(unsigned int power_state, 79 psci_power_state_t *req_state); 80 81 /* Declarations for plat_setup.c */ 82 const mmap_region_t *plat_get_mmio_map(void); 83 uint32_t plat_get_console_from_id(int id); 84 void plat_gic_setup(void); 85 86 /* Declarations for plat_secondary.c */ 87 void plat_secondary_setup(void); 88 int plat_lock_cpu_vectors(void); 89 90 /* Declarations for tegra_fiq_glue.c */ 91 void tegra_fiq_handler_setup(void); 92 int tegra_fiq_get_intr_context(void); 93 void tegra_fiq_set_ns_entrypoint(uint64_t entrypoint); 94 95 /* Declarations for tegra_gic.c */ 96 void tegra_gic_setup(const irq_sec_cfg_t *irq_sec_ptr, unsigned int num_irqs); 97 void tegra_gic_cpuif_deactivate(void); 98 99 /* Declarations for tegra_security.c */ 100 void tegra_security_setup(void); 101 void tegra_security_setup_videomem(uintptr_t base, uint64_t size); 102 103 /* Declarations for tegra_pm.c */ 104 void tegra_pm_system_suspend_entry(void); 105 void tegra_pm_system_suspend_exit(void); 106 int tegra_system_suspended(void); 107 108 /* Declarations for tegraXXX_pm.c */ 109 int tegra_prepare_cpu_suspend(unsigned int id, unsigned int afflvl); 110 int tegra_prepare_cpu_on_finish(unsigned long mpidr); 111 112 /* Declarations for tegra_bl31_setup.c */ 113 plat_params_from_bl2_t *bl31_get_plat_params(void); 114 int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes); 115 void plat_early_platform_setup(void); 116 117 /* Declarations for tegra_delay_timer.c */ 118 void tegra_delay_timer_init(void); 119 120 #endif /* __TEGRA_PRIVATE_H__ */ 121