1e954ab8fSVarun Wadekar /* 293c78ed2SAntonio Nino Diaz * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3e954ab8fSVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5e954ab8fSVarun Wadekar */ 6e954ab8fSVarun Wadekar 7c3cf06f1SAntonio Nino Diaz #ifndef TEGRA_PLATFORM_H 8c3cf06f1SAntonio Nino Diaz #define TEGRA_PLATFORM_H 9e954ab8fSVarun Wadekar 1093c78ed2SAntonio Nino Diaz #include <cdefs.h> 11c62be079SAnthony Zhou #include <stdbool.h> 12*d3b71331SMarvin Hsu #include <utils_def.h> 13*d3b71331SMarvin Hsu 14*d3b71331SMarvin Hsu /******************************************************************************* 15*d3b71331SMarvin Hsu * Tegra major, minor version helper macros 16*d3b71331SMarvin Hsu ******************************************************************************/ 17*d3b71331SMarvin Hsu #define MAJOR_VERSION_SHIFT U(0x4) 18*d3b71331SMarvin Hsu #define MAJOR_VERSION_MASK U(0xF) 19*d3b71331SMarvin Hsu #define MINOR_VERSION_SHIFT U(0x10) 20*d3b71331SMarvin Hsu #define MINOR_VERSION_MASK U(0xF) 21*d3b71331SMarvin Hsu #define CHIP_ID_SHIFT U(8) 22*d3b71331SMarvin Hsu #define CHIP_ID_MASK U(0xFF) 23*d3b71331SMarvin Hsu #define PRE_SI_PLATFORM_SHIFT U(0x14) 24*d3b71331SMarvin Hsu #define PRE_SI_PLATFORM_MASK U(0xF) 25e954ab8fSVarun Wadekar 26e954ab8fSVarun Wadekar /* 27*d3b71331SMarvin Hsu * Tegra chip ID values 28ea6dec5dSVarun Wadekar */ 29ea6dec5dSVarun Wadekar uint32_t tegra_get_chipid_major(void); 30ea6dec5dSVarun Wadekar uint32_t tegra_get_chipid_minor(void); 31ea6dec5dSVarun Wadekar 32ea6dec5dSVarun Wadekar /* 33*d3b71331SMarvin Hsu * Tegra chip ID identifiers 34e954ab8fSVarun Wadekar */ 35*d3b71331SMarvin Hsu bool tegra_chipid_is_t132(void); 36*d3b71331SMarvin Hsu bool tegra_chipid_is_t186(void); 37*d3b71331SMarvin Hsu bool tegra_chipid_is_t210(void); 38*d3b71331SMarvin Hsu bool tegra_chipid_is_t210_b01(void); 39cd3de432SVarun Wadekar 40e954ab8fSVarun Wadekar 41e954ab8fSVarun Wadekar /* 42e954ab8fSVarun Wadekar * Tegra platform identifiers 43e954ab8fSVarun Wadekar */ 44c62be079SAnthony Zhou bool tegra_platform_is_silicon(void); 45c62be079SAnthony Zhou bool tegra_platform_is_qt(void); 46c62be079SAnthony Zhou bool tegra_platform_is_emulation(void); 47c62be079SAnthony Zhou bool tegra_platform_is_linsim(void); 48c62be079SAnthony Zhou bool tegra_platform_is_fpga(void); 49c62be079SAnthony Zhou bool tegra_platform_is_unit_fpga(void); 50c62be079SAnthony Zhou bool tegra_platform_is_virt_dev_kit(void); 51e954ab8fSVarun Wadekar 52c3cf06f1SAntonio Nino Diaz #endif /* TEGRA_PLATFORM_H */ 53