1e954ab8fSVarun Wadekar /* 293c78ed2SAntonio Nino Diaz * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3e954ab8fSVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5e954ab8fSVarun Wadekar */ 6e954ab8fSVarun Wadekar 7c3cf06f1SAntonio Nino Diaz #ifndef TEGRA_PLATFORM_H 8c3cf06f1SAntonio Nino Diaz #define TEGRA_PLATFORM_H 9e954ab8fSVarun Wadekar 1093c78ed2SAntonio Nino Diaz #include <cdefs.h> 11*c62be079SAnthony Zhou #include <stdbool.h> 12e954ab8fSVarun Wadekar 13e954ab8fSVarun Wadekar /* 14ea6dec5dSVarun Wadekar * Tegra chip major/minor version 15ea6dec5dSVarun Wadekar */ 16ea6dec5dSVarun Wadekar uint32_t tegra_get_chipid_major(void); 17ea6dec5dSVarun Wadekar uint32_t tegra_get_chipid_minor(void); 18ea6dec5dSVarun Wadekar 19ea6dec5dSVarun Wadekar /* 20e954ab8fSVarun Wadekar * Tegra chip identifiers 21e954ab8fSVarun Wadekar */ 22cd3de432SVarun Wadekar uint8_t tegra_chipid_is_t132(void); 23cd3de432SVarun Wadekar uint8_t tegra_chipid_is_t210(void); 24cd3de432SVarun Wadekar uint8_t tegra_chipid_is_t186(void); 25cd3de432SVarun Wadekar 26e954ab8fSVarun Wadekar 27e954ab8fSVarun Wadekar /* 28e954ab8fSVarun Wadekar * Tegra platform identifiers 29e954ab8fSVarun Wadekar */ 30*c62be079SAnthony Zhou bool tegra_platform_is_silicon(void); 31*c62be079SAnthony Zhou bool tegra_platform_is_qt(void); 32*c62be079SAnthony Zhou bool tegra_platform_is_emulation(void); 33*c62be079SAnthony Zhou bool tegra_platform_is_linsim(void); 34*c62be079SAnthony Zhou bool tegra_platform_is_fpga(void); 35*c62be079SAnthony Zhou bool tegra_platform_is_unit_fpga(void); 36*c62be079SAnthony Zhou bool tegra_platform_is_virt_dev_kit(void); 37e954ab8fSVarun Wadekar 38c3cf06f1SAntonio Nino Diaz #endif /* TEGRA_PLATFORM_H */ 39