1e954ab8fSVarun Wadekar /* 2e954ab8fSVarun Wadekar * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3e954ab8fSVarun Wadekar * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5e954ab8fSVarun Wadekar */ 6e954ab8fSVarun Wadekar 7e954ab8fSVarun Wadekar #ifndef __TEGRA_PLATFORM_H__ 8e954ab8fSVarun Wadekar #define __TEGRA_PLATFORM_H__ 9e954ab8fSVarun Wadekar 10e954ab8fSVarun Wadekar #include <sys/cdefs.h> 11e954ab8fSVarun Wadekar 12e954ab8fSVarun Wadekar /* 13ea6dec5dSVarun Wadekar * Tegra chip major/minor version 14ea6dec5dSVarun Wadekar */ 15ea6dec5dSVarun Wadekar uint32_t tegra_get_chipid_major(void); 16ea6dec5dSVarun Wadekar uint32_t tegra_get_chipid_minor(void); 17ea6dec5dSVarun Wadekar 18ea6dec5dSVarun Wadekar /* 19e954ab8fSVarun Wadekar * Tegra chip identifiers 20e954ab8fSVarun Wadekar */ 21cd3de432SVarun Wadekar uint8_t tegra_chipid_is_t132(void); 22cd3de432SVarun Wadekar uint8_t tegra_chipid_is_t210(void); 23cd3de432SVarun Wadekar uint8_t tegra_chipid_is_t186(void); 24cd3de432SVarun Wadekar 25e954ab8fSVarun Wadekar 26e954ab8fSVarun Wadekar /* 27e954ab8fSVarun Wadekar * Tegra platform identifiers 28e954ab8fSVarun Wadekar */ 29e954ab8fSVarun Wadekar uint8_t tegra_platform_is_silicon(void); 30e954ab8fSVarun Wadekar uint8_t tegra_platform_is_qt(void); 31e954ab8fSVarun Wadekar uint8_t tegra_platform_is_emulation(void); 32e954ab8fSVarun Wadekar uint8_t tegra_platform_is_fpga(void); 33e954ab8fSVarun Wadekar 34e954ab8fSVarun Wadekar #endif /* __TEGRA_PLATFORM_H__ */ 35