xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/t194/tegra194_private.h (revision 040529e9e67f23dc85f4ff5aec94debf8cecb3cc)
1653fc380SVarun Wadekar /*
2653fc380SVarun Wadekar  * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
3653fc380SVarun Wadekar  *
4653fc380SVarun Wadekar  * SPDX-License-Identifier: BSD-3-Clause
5653fc380SVarun Wadekar  */
6653fc380SVarun Wadekar 
7653fc380SVarun Wadekar #ifndef __TEGRA194_PRIVATE_H__
8653fc380SVarun Wadekar #define __TEGRA194_PRIVATE_H__
9653fc380SVarun Wadekar 
10653fc380SVarun Wadekar void tegra194_cpu_reset_handler(void);
11653fc380SVarun Wadekar uint64_t tegra194_get_cpu_reset_handler_base(void);
12653fc380SVarun Wadekar uint64_t tegra194_get_cpu_reset_handler_size(void);
13653fc380SVarun Wadekar uint64_t tegra194_get_smmu_ctx_offset(void);
14*040529e9SVarun Wadekar void tegra194_set_system_suspend_entry(void);
15653fc380SVarun Wadekar 
16653fc380SVarun Wadekar #endif /* __TEGRA194_PRIVATE_H__ */
17