17191566cSVarun Wadekar /* 27191566cSVarun Wadekar * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. 37191566cSVarun Wadekar * 47191566cSVarun Wadekar * SPDX-License-Identifier: BSD-3-Clause 57191566cSVarun Wadekar */ 67191566cSVarun Wadekar 77191566cSVarun Wadekar #ifndef TEGRA186_PRIVATE_H 87191566cSVarun Wadekar #define TEGRA186_PRIVATE_H 97191566cSVarun Wadekar 107191566cSVarun Wadekar void tegra186_cpu_reset_handler(void); 117191566cSVarun Wadekar uint64_t tegra186_get_cpu_reset_handler_base(void); 127191566cSVarun Wadekar uint64_t tegra186_get_cpu_reset_handler_size(void); 13889c07c7SVarun Wadekar uint64_t tegra186_get_smmu_ctx_offset(void); 14*539c62d7SVarun Wadekar void tegra186_set_system_suspend_entry(void); 157191566cSVarun Wadekar 167191566cSVarun Wadekar #endif /* TEGRA186_PRIVATE_H */ 17