180c50eeaSVarun Wadekar /* 280c50eeaSVarun Wadekar * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 380c50eeaSVarun Wadekar * 480c50eeaSVarun Wadekar * SPDX-License-Identifier: BSD-3-Clause 580c50eeaSVarun Wadekar */ 680c50eeaSVarun Wadekar 780c50eeaSVarun Wadekar #ifndef __TEGRA_GIC_H__ 880c50eeaSVarun Wadekar #define __TEGRA_GIC_H__ 980c50eeaSVarun Wadekar 10*09d40e0eSAntonio Nino Diaz #include <common/interrupt_props.h> 1180c50eeaSVarun Wadekar 1280c50eeaSVarun Wadekar /******************************************************************************* 1380c50eeaSVarun Wadekar * Per-CPU struct describing FIQ state to be stored 1480c50eeaSVarun Wadekar ******************************************************************************/ 1580c50eeaSVarun Wadekar typedef struct pcpu_fiq_state { 1680c50eeaSVarun Wadekar uint64_t elr_el3; 1780c50eeaSVarun Wadekar uint64_t spsr_el3; 1880c50eeaSVarun Wadekar } pcpu_fiq_state_t; 1980c50eeaSVarun Wadekar 2080c50eeaSVarun Wadekar /******************************************************************************* 2180c50eeaSVarun Wadekar * Fucntion declarations 2280c50eeaSVarun Wadekar ******************************************************************************/ 2380c50eeaSVarun Wadekar void tegra_gic_cpuif_deactivate(void); 2480c50eeaSVarun Wadekar void tegra_gic_init(void); 2580c50eeaSVarun Wadekar void tegra_gic_pcpu_init(void); 2680c50eeaSVarun Wadekar void tegra_gic_setup(const interrupt_prop_t *interrupt_props, 2780c50eeaSVarun Wadekar unsigned int interrupt_props_num); 2880c50eeaSVarun Wadekar 2980c50eeaSVarun Wadekar #endif /* __TEGRA_GIC_H__ */ 30