xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/smmu.h (revision 50e91633eeafdecb6b15503c0379b1a07e1e2c20)
14122151fSVarun Wadekar /*
206803cfdSPritesh Raithatha  * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
34122151fSVarun Wadekar  *
44122151fSVarun Wadekar  * Redistribution and use in source and binary forms, with or without
54122151fSVarun Wadekar  * modification, are permitted provided that the following conditions are met:
64122151fSVarun Wadekar  *
74122151fSVarun Wadekar  * Redistributions of source code must retain the above copyright notice, this
84122151fSVarun Wadekar  * list of conditions and the following disclaimer.
94122151fSVarun Wadekar  *
104122151fSVarun Wadekar  * Redistributions in binary form must reproduce the above copyright notice,
114122151fSVarun Wadekar  * this list of conditions and the following disclaimer in the documentation
124122151fSVarun Wadekar  * and/or other materials provided with the distribution.
134122151fSVarun Wadekar  *
144122151fSVarun Wadekar  * Neither the name of ARM nor the names of its contributors may be used
154122151fSVarun Wadekar  * to endorse or promote products derived from this software without specific
164122151fSVarun Wadekar  * prior written permission.
174122151fSVarun Wadekar  *
184122151fSVarun Wadekar  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194122151fSVarun Wadekar  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204122151fSVarun Wadekar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214122151fSVarun Wadekar  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224122151fSVarun Wadekar  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234122151fSVarun Wadekar  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244122151fSVarun Wadekar  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254122151fSVarun Wadekar  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264122151fSVarun Wadekar  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274122151fSVarun Wadekar  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284122151fSVarun Wadekar  * POSSIBILITY OF SUCH DAMAGE.
294122151fSVarun Wadekar  */
304122151fSVarun Wadekar 
314122151fSVarun Wadekar #ifndef __SMMU_H
324122151fSVarun Wadekar #define __SMMU_H
334122151fSVarun Wadekar 
3406803cfdSPritesh Raithatha #include <memctrl_v2.h>
354122151fSVarun Wadekar #include <mmio.h>
364122151fSVarun Wadekar #include <tegra_def.h>
374122151fSVarun Wadekar 
384122151fSVarun Wadekar /*******************************************************************************
394122151fSVarun Wadekar  * SMMU Register constants
404122151fSVarun Wadekar  ******************************************************************************/
41*50e91633SAnthony Zhou #define SMMU_CBn_SCTLR				(0x0U)
42*50e91633SAnthony Zhou #define SMMU_CBn_SCTLR_STAGE2			(0x0U)
43*50e91633SAnthony Zhou #define SMMU_CBn_ACTLR				(0x4U)
44*50e91633SAnthony Zhou #define SMMU_CBn_RESUME				(0x8U)
45*50e91633SAnthony Zhou #define SMMU_CBn_TCR2				(0x10U)
46*50e91633SAnthony Zhou #define SMMU_CBn_TTBR0_LO			(0x20U)
47*50e91633SAnthony Zhou #define SMMU_CBn_TTBR0_HI			(0x24U)
48*50e91633SAnthony Zhou #define SMMU_CBn_TTBR1_LO			(0x28U)
49*50e91633SAnthony Zhou #define SMMU_CBn_TTBR1_HI			(0x2cU)
50*50e91633SAnthony Zhou #define SMMU_CBn_TCR_LPAE			(0x30U)
51*50e91633SAnthony Zhou #define SMMU_CBn_TCR				(0x30U)
52*50e91633SAnthony Zhou #define SMMU_CBn_TCR_EAE_1			(0x30U)
53*50e91633SAnthony Zhou #define SMMU_CBn_TCR				(0x30U)
54*50e91633SAnthony Zhou #define SMMU_CBn_CONTEXTIDR			(0x34U)
55*50e91633SAnthony Zhou #define SMMU_CBn_CONTEXTIDR_EAE_1		(0x34U)
56*50e91633SAnthony Zhou #define SMMU_CBn_PRRR_MAIR0			(0x38U)
57*50e91633SAnthony Zhou #define SMMU_CBn_NMRR_MAIR1			(0x3cU)
58*50e91633SAnthony Zhou #define SMMU_CBn_SMMU_CBn_PAR			(0x50U)
59*50e91633SAnthony Zhou #define SMMU_CBn_SMMU_CBn_PAR0			(0x50U)
60*50e91633SAnthony Zhou #define SMMU_CBn_SMMU_CBn_PAR1			(0x54U)
61*50e91633SAnthony Zhou /*      SMMU_CBn_SMMU_CBn_PAR0_Fault		(0x50U) */
62*50e91633SAnthony Zhou /*      SMMU_CBn_SMMU_CBn_PAR0_Fault		(0x54U) */
63*50e91633SAnthony Zhou #define SMMU_CBn_FSR				(0x58U)
64*50e91633SAnthony Zhou #define SMMU_CBn_FSRRESTORE			(0x5cU)
65*50e91633SAnthony Zhou #define SMMU_CBn_FAR_LO				(0x60U)
66*50e91633SAnthony Zhou #define SMMU_CBn_FAR_HI				(0x64U)
67*50e91633SAnthony Zhou #define SMMU_CBn_FSYNR0				(0x68U)
68*50e91633SAnthony Zhou #define SMMU_CBn_IPAFAR_LO			(0x70U)
69*50e91633SAnthony Zhou #define SMMU_CBn_IPAFAR_HI			(0x74U)
70*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVA_LO			(0x600U)
71*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVA_HI			(0x604U)
72*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVA_AARCH_32		(0x600U)
73*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAA_LO			(0x608U)
74*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAA_HI			(0x60cU)
75*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAA_AARCH_32		(0x608U)
76*50e91633SAnthony Zhou #define SMMU_CBn_TLBIASID			(0x610U)
77*50e91633SAnthony Zhou #define SMMU_CBn_TLBIALL			(0x618U)
78*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAL_LO			(0x620U)
79*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAL_HI			(0x624U)
80*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAL_AARCH_32		(0x618U)
81*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAAL_LO			(0x628U)
82*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAAL_HI			(0x62cU)
83*50e91633SAnthony Zhou #define SMMU_CBn_TLBIVAAL_AARCH_32		(0x628U)
84*50e91633SAnthony Zhou #define SMMU_CBn_TLBIIPAS2_LO			(0x630U)
85*50e91633SAnthony Zhou #define SMMU_CBn_TLBIIPAS2_HI			(0x634U)
86*50e91633SAnthony Zhou #define SMMU_CBn_TLBIIPAS2L_LO			(0x638U)
87*50e91633SAnthony Zhou #define SMMU_CBn_TLBIIPAS2L_HI			(0x63cU)
88*50e91633SAnthony Zhou #define SMMU_CBn_TLBSYNC			(0x7f0U)
89*50e91633SAnthony Zhou #define SMMU_CBn_TLBSTATUS			(0x7f4U)
90*50e91633SAnthony Zhou #define SMMU_CBn_ATSR				(0x800U)
91*50e91633SAnthony Zhou #define SMMU_CBn_PMEVCNTR0			(0xe00U)
92*50e91633SAnthony Zhou #define SMMU_CBn_PMEVCNTR1			(0xe04U)
93*50e91633SAnthony Zhou #define SMMU_CBn_PMEVCNTR2			(0xe08U)
94*50e91633SAnthony Zhou #define SMMU_CBn_PMEVCNTR3			(0xe0cU)
95*50e91633SAnthony Zhou #define SMMU_CBn_PMEVTYPER0			(0xe80U)
96*50e91633SAnthony Zhou #define SMMU_CBn_PMEVTYPER1			(0xe84U)
97*50e91633SAnthony Zhou #define SMMU_CBn_PMEVTYPER2			(0xe88U)
98*50e91633SAnthony Zhou #define SMMU_CBn_PMEVTYPER3			(0xe8cU)
99*50e91633SAnthony Zhou #define SMMU_CBn_PMCFGR				(0xf00U)
100*50e91633SAnthony Zhou #define SMMU_CBn_PMCR				(0xf04U)
101*50e91633SAnthony Zhou #define SMMU_CBn_PMCEID				(0xf20U)
102*50e91633SAnthony Zhou #define SMMU_CBn_PMCNTENSE			(0xf40U)
103*50e91633SAnthony Zhou #define SMMU_CBn_PMCNTENCLR			(0xf44U)
104*50e91633SAnthony Zhou #define SMMU_CBn_PMCNTENSET			(0xf48U)
105*50e91633SAnthony Zhou #define SMMU_CBn_PMINTENCLR			(0xf4cU)
106*50e91633SAnthony Zhou #define SMMU_CBn_PMOVSCLR			(0xf50U)
107*50e91633SAnthony Zhou #define SMMU_CBn_PMOVSSET			(0xf58U)
108*50e91633SAnthony Zhou #define SMMU_CBn_PMAUTHSTATUS			(0xfb8U)
109*50e91633SAnthony Zhou #define SMMU_GNSR0_CR0				(0x0U)
110*50e91633SAnthony Zhou #define SMMU_GNSR0_CR2				(0x8U)
111*50e91633SAnthony Zhou #define SMMU_GNSR0_ACR				(0x10U)
112*50e91633SAnthony Zhou #define SMMU_GNSR0_IDR0				(0x20U)
113*50e91633SAnthony Zhou #define SMMU_GNSR0_IDR1				(0x24U)
114*50e91633SAnthony Zhou #define SMMU_GNSR0_IDR2				(0x28U)
115*50e91633SAnthony Zhou #define SMMU_GNSR0_IDR7				(0x3cU)
116*50e91633SAnthony Zhou #define SMMU_GNSR0_GFAR_LO			(0x40U)
117*50e91633SAnthony Zhou #define SMMU_GNSR0_GFAR_HI			(0x44U)
118*50e91633SAnthony Zhou #define SMMU_GNSR0_GFSR				(0x48U)
119*50e91633SAnthony Zhou #define SMMU_GNSR0_GFSRRESTORE			(0x4cU)
120*50e91633SAnthony Zhou #define SMMU_GNSR0_GFSYNR0			(0x50U)
121*50e91633SAnthony Zhou #define SMMU_GNSR0_GFSYNR1			(0x54U)
122*50e91633SAnthony Zhou #define SMMU_GNSR0_GFSYNR1_v2			(0x54U)
123*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVMID			(0x64U)
124*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIALLNSNH			(0x68U)
125*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIALLH			(0x6cU)
126*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBGSYNC			(0x70U)
127*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBGSTATUS			(0x74U)
128*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVAH_LO			(0x78U)
129*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVALH64_LO		(0xb0U)
130*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVALH64_HI		(0xb4U)
131*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVMIDS1			(0xb8U)
132*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVAH64_LO			(0xc0U)
133*50e91633SAnthony Zhou #define SMMU_GNSR0_TLBIVAH64_HI			(0xc4U)
134*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR0				(0x800U)
135*50e91633SAnthony Zhou #define SMMU_GNSR0_SMRn				(0x800U)
136*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR1				(0x804U)
137*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR2				(0x808U)
138*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR3				(0x80cU)
139*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR4				(0x810U)
140*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR5				(0x814U)
141*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR6				(0x818U)
142*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR7				(0x81cU)
143*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR8				(0x820U)
144*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR9				(0x824U)
145*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR10			(0x828U)
146*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR11			(0x82cU)
147*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR12			(0x830U)
148*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR13			(0x834U)
149*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR14			(0x838U)
150*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR15			(0x83cU)
151*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR16			(0x840U)
152*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR17			(0x844U)
153*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR18			(0x848U)
154*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR19			(0x84cU)
155*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR20			(0x850U)
156*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR21			(0x854U)
157*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR22			(0x858U)
158*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR23			(0x85cU)
159*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR24			(0x860U)
160*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR25			(0x864U)
161*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR26			(0x868U)
162*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR27			(0x86cU)
163*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR28			(0x870U)
164*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR29			(0x874U)
165*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR30			(0x878U)
166*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR31			(0x87cU)
167*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR32			(0x880U)
168*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR33			(0x884U)
169*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR34			(0x888U)
170*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR35			(0x88cU)
171*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR36			(0x890U)
172*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR37			(0x894U)
173*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR38			(0x898U)
174*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR39			(0x89cU)
175*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR40			(0x8a0U)
176*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR41			(0x8a4U)
177*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR42			(0x8a8U)
178*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR43			(0x8acU)
179*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR44			(0x8b0U)
180*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR45			(0x8b4U)
181*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR46			(0x8b8U)
182*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR47			(0x8bcU)
183*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR48			(0x8c0U)
184*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR49			(0x8c4U)
185*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR50			(0x8c8U)
186*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR51			(0x8ccU)
187*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR52			(0x8d0U)
188*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR53			(0x8d4U)
189*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR54			(0x8d8U)
190*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR55			(0x8dcU)
191*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR56			(0x8e0U)
192*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR57			(0x8e4U)
193*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR58			(0x8e8U)
194*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR59			(0x8ecU)
195*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR60			(0x8f0U)
196*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR61			(0x8f4U)
197*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR62			(0x8f8U)
198*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR63			(0x8fcU)
199*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR64			(0x900U)
200*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR65			(0x904U)
201*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR66			(0x908U)
202*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR67			(0x90cU)
203*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR68			(0x910U)
204*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR69			(0x914U)
205*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR70			(0x918U)
206*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR71			(0x91cU)
207*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR72			(0x920U)
208*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR73			(0x924U)
209*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR74			(0x928U)
210*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR75			(0x92cU)
211*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR76			(0x930U)
212*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR77			(0x934U)
213*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR78			(0x938U)
214*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR79			(0x93cU)
215*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR80			(0x940U)
216*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR81			(0x944U)
217*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR82			(0x948U)
218*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR83			(0x94cU)
219*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR84			(0x950U)
220*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR85			(0x954U)
221*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR86			(0x958U)
222*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR87			(0x95cU)
223*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR88			(0x960U)
224*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR89			(0x964U)
225*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR90			(0x968U)
226*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR91			(0x96cU)
227*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR92			(0x970U)
228*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR93			(0x974U)
229*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR94			(0x978U)
230*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR95			(0x97cU)
231*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR96			(0x980U)
232*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR97			(0x984U)
233*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR98			(0x988U)
234*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR99			(0x98cU)
235*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR100			(0x990U)
236*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR101			(0x994U)
237*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR102			(0x998U)
238*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR103			(0x99cU)
239*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR104			(0x9a0U)
240*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR105			(0x9a4U)
241*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR106			(0x9a8U)
242*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR107			(0x9acU)
243*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR108			(0x9b0U)
244*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR109			(0x9b4U)
245*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR110			(0x9b8U)
246*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR111			(0x9bcU)
247*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR112			(0x9c0U)
248*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR113			(0x9c4U)
249*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR114			(0x9c8U)
250*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR115			(0x9ccU)
251*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR116			(0x9d0U)
252*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR117			(0x9d4U)
253*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR118			(0x9d8U)
254*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR119			(0x9dcU)
255*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR120			(0x9e0U)
256*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR121			(0x9e4U)
257*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR122			(0x9e8U)
258*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR123			(0x9ecU)
259*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR124			(0x9f0U)
260*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR125			(0x9f4U)
261*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR126			(0x9f8U)
262*50e91633SAnthony Zhou #define SMMU_GNSR0_SMR127			(0x9fcU)
263*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR0			(0xc00U)
264*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CRn			(0xc00U)
265*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CRn			(0xc00U)
266*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR1			(0xc04U)
267*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR2			(0xc08U)
268*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR3			(0xc0cU)
269*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR4			(0xc10U)
270*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR5			(0xc14U)
271*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR6			(0xc18U)
272*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR7			(0xc1cU)
273*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR8			(0xc20U)
274*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR9			(0xc24U)
275*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR10			(0xc28U)
276*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR11			(0xc2cU)
277*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR12			(0xc30U)
278*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR13			(0xc34U)
279*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR14			(0xc38U)
280*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR15			(0xc3cU)
281*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR16			(0xc40U)
282*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR17			(0xc44U)
283*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR18			(0xc48U)
284*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR19			(0xc4cU)
285*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR20			(0xc50U)
286*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR21			(0xc54U)
287*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR22			(0xc58U)
288*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR23			(0xc5cU)
289*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR24			(0xc60U)
290*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR25			(0xc64U)
291*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR26			(0xc68U)
292*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR27			(0xc6cU)
293*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR28			(0xc70U)
294*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR29			(0xc74U)
295*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR30			(0xc78U)
296*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR31			(0xc7cU)
297*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR32			(0xc80U)
298*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR33			(0xc84U)
299*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR34			(0xc88U)
300*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR35			(0xc8cU)
301*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR36			(0xc90U)
302*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR37			(0xc94U)
303*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR38			(0xc98U)
304*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR39			(0xc9cU)
305*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR40			(0xca0U)
306*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR41			(0xca4U)
307*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR42			(0xca8U)
308*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR43			(0xcacU)
309*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR44			(0xcb0U)
310*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR45			(0xcb4U)
311*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR46			(0xcb8U)
312*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR47			(0xcbcU)
313*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR48			(0xcc0U)
314*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR49			(0xcc4U)
315*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR50			(0xcc8U)
316*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR51			(0xcccU)
317*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR52			(0xcd0U)
318*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR53			(0xcd4U)
319*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR54			(0xcd8U)
320*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR55			(0xcdcU)
321*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR56			(0xce0U)
322*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR57			(0xce4U)
323*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR58			(0xce8U)
324*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR59			(0xcecU)
325*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR60			(0xcf0U)
326*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR61			(0xcf4U)
327*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR62			(0xcf8U)
328*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR63			(0xcfcU)
329*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR64			(0xd00U)
330*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR65			(0xd04U)
331*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR66			(0xd08U)
332*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR67			(0xd0cU)
333*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR68			(0xd10U)
334*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR69			(0xd14U)
335*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR70			(0xd18U)
336*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR71			(0xd1cU)
337*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR72			(0xd20U)
338*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR73			(0xd24U)
339*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR74			(0xd28U)
340*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR75			(0xd2cU)
341*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR76			(0xd30U)
342*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR77			(0xd34U)
343*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR78			(0xd38U)
344*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR79			(0xd3cU)
345*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR80			(0xd40U)
346*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR81			(0xd44U)
347*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR82			(0xd48U)
348*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR83			(0xd4cU)
349*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR84			(0xd50U)
350*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR85			(0xd54U)
351*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR86			(0xd58U)
352*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR87			(0xd5cU)
353*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR88			(0xd60U)
354*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR89			(0xd64U)
355*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR90			(0xd68U)
356*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR91			(0xd6cU)
357*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR92			(0xd70U)
358*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR93			(0xd74U)
359*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR94			(0xd78U)
360*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR95			(0xd7cU)
361*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR96			(0xd80U)
362*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR97			(0xd84U)
363*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR98			(0xd88U)
364*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR99			(0xd8cU)
365*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR100			(0xd90U)
366*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR101			(0xd94U)
367*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR102			(0xd98U)
368*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR103			(0xd9cU)
369*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR104			(0xda0U)
370*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR105			(0xda4U)
371*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR106			(0xda8U)
372*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR107			(0xdacU)
373*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR108			(0xdb0U)
374*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR109			(0xdb4U)
375*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR110			(0xdb8U)
376*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR111			(0xdbcU)
377*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR112			(0xdc0U)
378*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR113			(0xdc4U)
379*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR114			(0xdc8U)
380*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR115			(0xdccU)
381*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR116			(0xdd0U)
382*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR117			(0xdd4U)
383*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR118			(0xdd8U)
384*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR119			(0xddcU)
385*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR120			(0xde0U)
386*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR121			(0xde4U)
387*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR122			(0xde8U)
388*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR123			(0xdecU)
389*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR124			(0xdf0U)
390*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR125			(0xdf4U)
391*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR126			(0xdf8U)
392*50e91633SAnthony Zhou #define SMMU_GNSR0_S2CR127			(0xdfcU)
393*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR0			(0xfe0U)
394*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR1			(0xfe4U)
395*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR2			(0xfe8U)
396*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR3			(0xfecU)
397*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR4			(0xfd0U)
398*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR5			(0xfd4U)
399*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR6			(0xfd8U)
400*50e91633SAnthony Zhou #define SMMU_GNSR0_PIDR7			(0xfdcU)
401*50e91633SAnthony Zhou #define SMMU_GNSR0_CIDR0			(0xff0U)
402*50e91633SAnthony Zhou #define SMMU_GNSR0_CIDR1			(0xff4U)
403*50e91633SAnthony Zhou #define SMMU_GNSR0_CIDR2			(0xff8U)
404*50e91633SAnthony Zhou #define SMMU_GNSR0_CIDR3			(0xffcU)
405*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR0			(0x0U)
406*50e91633SAnthony Zhou #define SMMU_GNSR1_CBARn			(0x0U)
407*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA0			(0x400U)
408*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R0			(0x800U)
409*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR1			(0x4U)
410*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA1			(0x404U)
411*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R1			(0x804U)
412*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR2			(0x8U)
413*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA2			(0x408U)
414*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R2			(0x808U)
415*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR3			(0xcU)
416*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA3			(0x40cU)
417*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R3			(0x80cU)
418*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR4			(0x10U)
419*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA4			(0x410U)
420*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R4			(0x810U)
421*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR5			(0x14U)
422*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA5			(0x414U)
423*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R5			(0x814U)
424*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR6			(0x18U)
425*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA6			(0x418U)
426*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R6			(0x818U)
427*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR7			(0x1cU)
428*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA7			(0x41cU)
429*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R7			(0x81cU)
430*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR8			(0x20U)
431*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA8			(0x420U)
432*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R8			(0x820U)
433*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR9			(0x24U)
434*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA9			(0x424U)
435*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R9			(0x824U)
436*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR10			(0x28U)
437*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA10			(0x428U)
438*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R10			(0x828U)
439*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR11			(0x2cU)
440*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA11			(0x42cU)
441*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R11			(0x82cU)
442*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR12			(0x30U)
443*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA12			(0x430U)
444*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R12			(0x830U)
445*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR13			(0x34U)
446*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA13			(0x434U)
447*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R13			(0x834U)
448*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR14			(0x38U)
449*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA14			(0x438U)
450*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R14			(0x838U)
451*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR15			(0x3cU)
452*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA15			(0x43cU)
453*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R15			(0x83cU)
454*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR16			(0x40U)
455*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA16			(0x440U)
456*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R16			(0x840U)
457*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR17			(0x44U)
458*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA17			(0x444U)
459*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R17			(0x844U)
460*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR18			(0x48U)
461*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA18			(0x448U)
462*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R18			(0x848U)
463*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR19			(0x4cU)
464*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA19			(0x44cU)
465*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R19			(0x84cU)
466*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR20			(0x50U)
467*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA20			(0x450U)
468*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R20			(0x850U)
469*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR21			(0x54U)
470*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA21			(0x454U)
471*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R21			(0x854U)
472*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR22			(0x58U)
473*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA22			(0x458U)
474*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R22			(0x858U)
475*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR23			(0x5cU)
476*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA23			(0x45cU)
477*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R23			(0x85cU)
478*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR24			(0x60U)
479*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA24			(0x460U)
480*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R24			(0x860U)
481*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR25			(0x64U)
482*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA25			(0x464U)
483*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R25			(0x864U)
484*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR26			(0x68U)
485*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA26			(0x468U)
486*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R26			(0x868U)
487*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR27			(0x6cU)
488*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA27			(0x46cU)
489*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R27			(0x86cU)
490*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR28			(0x70U)
491*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA28			(0x470U)
492*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R28			(0x870U)
493*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR29			(0x74U)
494*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA29			(0x474U)
495*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R29			(0x874U)
496*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR30			(0x78U)
497*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA30			(0x478U)
498*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R30			(0x878U)
499*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR31			(0x7cU)
500*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA31			(0x47cU)
501*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R31			(0x87cU)
502*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR32			(0x80U)
503*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA32			(0x480U)
504*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R32			(0x880U)
505*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR33			(0x84U)
506*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA33			(0x484U)
507*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R33			(0x884U)
508*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR34			(0x88U)
509*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA34			(0x488U)
510*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R34			(0x888U)
511*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR35			(0x8cU)
512*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA35			(0x48cU)
513*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R35			(0x88cU)
514*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR36			(0x90U)
515*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA36			(0x490U)
516*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R36			(0x890U)
517*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR37			(0x94U)
518*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA37			(0x494U)
519*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R37			(0x894U)
520*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR38			(0x98U)
521*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA38			(0x498U)
522*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R38			(0x898U)
523*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR39			(0x9cU)
524*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA39			(0x49cU)
525*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R39			(0x89cU)
526*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR40			(0xa0U)
527*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA40			(0x4a0U)
528*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R40			(0x8a0U)
529*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR41			(0xa4U)
530*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA41			(0x4a4U)
531*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R41			(0x8a4U)
532*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR42			(0xa8U)
533*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA42			(0x4a8U)
534*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R42			(0x8a8U)
535*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR43			(0xacU)
536*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA43			(0x4acU)
537*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R43			(0x8acU)
538*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR44			(0xb0U)
539*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA44			(0x4b0U)
540*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R44			(0x8b0U)
541*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR45			(0xb4U)
542*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA45			(0x4b4U)
543*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R45			(0x8b4U)
544*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR46			(0xb8U)
545*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA46			(0x4b8U)
546*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R46			(0x8b8U)
547*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR47			(0xbcU)
548*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA47			(0x4bcU)
549*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R47			(0x8bcU)
550*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR48			(0xc0U)
551*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA48			(0x4c0U)
552*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R48			(0x8c0U)
553*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR49			(0xc4U)
554*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA49			(0x4c4U)
555*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R49			(0x8c4U)
556*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR50			(0xc8U)
557*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA50			(0x4c8U)
558*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R50			(0x8c8U)
559*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR51			(0xccU)
560*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA51			(0x4ccU)
561*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R51			(0x8ccU)
562*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR52			(0xd0U)
563*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA52			(0x4d0U)
564*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R52			(0x8d0U)
565*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR53			(0xd4U)
566*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA53			(0x4d4U)
567*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R53			(0x8d4U)
568*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR54			(0xd8U)
569*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA54			(0x4d8U)
570*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R54			(0x8d8U)
571*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR55			(0xdcU)
572*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA55			(0x4dcU)
573*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R55			(0x8dcU)
574*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR56			(0xe0U)
575*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA56			(0x4e0U)
576*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R56			(0x8e0U)
577*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR57			(0xe4U)
578*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA57			(0x4e4U)
579*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R57			(0x8e4U)
580*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR58			(0xe8U)
581*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA58			(0x4e8U)
582*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R58			(0x8e8U)
583*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR59			(0xecU)
584*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA59			(0x4ecU)
585*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R59			(0x8ecU)
586*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR60			(0xf0U)
587*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA60			(0x4f0U)
588*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R60			(0x8f0U)
589*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR61			(0xf4U)
590*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA61			(0x4f4U)
591*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R61			(0x8f4U)
592*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR62			(0xf8U)
593*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA62			(0x4f8U)
594*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R62			(0x8f8U)
595*50e91633SAnthony Zhou #define SMMU_GNSR1_CBAR63			(0xfcU)
596*50e91633SAnthony Zhou #define SMMU_GNSR1_CBFRSYNRA63			(0x4fcU)
597*50e91633SAnthony Zhou #define SMMU_GNSR1_CBA2R63			(0x8fcU)
5984122151fSVarun Wadekar 
5994122151fSVarun Wadekar /*******************************************************************************
6004122151fSVarun Wadekar  * SMMU Global Secure Aux. Configuration Register
6014122151fSVarun Wadekar  ******************************************************************************/
602*50e91633SAnthony Zhou #define SMMU_GSR0_SECURE_ACR			0x10U
603*50e91633SAnthony Zhou #define SMMU_GNSR_ACR				(SMMU_GSR0_SECURE_ACR + 0x400U)
604*50e91633SAnthony Zhou #define SMMU_GSR0_PGSIZE_SHIFT			16U
605*50e91633SAnthony Zhou #define SMMU_GSR0_PGSIZE_4K			(0U << SMMU_GSR0_PGSIZE_SHIFT)
606*50e91633SAnthony Zhou #define SMMU_GSR0_PGSIZE_64K			(1U << SMMU_GSR0_PGSIZE_SHIFT)
607*50e91633SAnthony Zhou #define SMMU_ACR_CACHE_LOCK_ENABLE_BIT		(1U << 26)
608698f4250SVarun Wadekar 
609698f4250SVarun Wadekar /*******************************************************************************
610698f4250SVarun Wadekar  * SMMU Global Aux. Control Register
611698f4250SVarun Wadekar  ******************************************************************************/
612*50e91633SAnthony Zhou #define SMMU_CBn_ACTLR_CPRE_BIT			(1U << 1)
6134122151fSVarun Wadekar 
6144122151fSVarun Wadekar /*******************************************************************************
6154122151fSVarun Wadekar  * SMMU configuration constants
6164122151fSVarun Wadekar  ******************************************************************************/
617*50e91633SAnthony Zhou #define ID1_PAGESIZE				(1U << 31)
618*50e91633SAnthony Zhou #define ID1_NUMPAGENDXB_SHIFT			28U
619*50e91633SAnthony Zhou #define ID1_NUMPAGENDXB_MASK			7U
620*50e91633SAnthony Zhou #define ID1_NUMS2CB_SHIFT			16U
621*50e91633SAnthony Zhou #define ID1_NUMS2CB_MASK			0xffU
622*50e91633SAnthony Zhou #define ID1_NUMCB_SHIFT				0U
623*50e91633SAnthony Zhou #define ID1_NUMCB_MASK				0xffU
624*50e91633SAnthony Zhou #define PGSHIFT					16U
625*50e91633SAnthony Zhou #define CB_SIZE					0x800000U
6264122151fSVarun Wadekar 
627986e333dSPritesh Raithatha typedef struct smmu_regs {
628986e333dSPritesh Raithatha 	uint32_t reg;
629986e333dSPritesh Raithatha 	uint32_t val;
630986e333dSPritesh Raithatha } smmu_regs_t;
631986e333dSPritesh Raithatha 
632986e333dSPritesh Raithatha #define mc_make_sid_override_cfg(name) \
633986e333dSPritesh Raithatha 	{ \
634986e333dSPritesh Raithatha 		.reg = TEGRA_MC_STREAMID_BASE + MC_STREAMID_OVERRIDE_CFG_ ## name, \
635*50e91633SAnthony Zhou 		.val = 0x00000000U, \
6364122151fSVarun Wadekar 	}
6374122151fSVarun Wadekar 
638986e333dSPritesh Raithatha #define mc_make_sid_security_cfg(name) \
639986e333dSPritesh Raithatha 	{ \
640986e333dSPritesh Raithatha 		.reg = TEGRA_MC_STREAMID_BASE + MC_STREAMID_OVERRIDE_TO_SECURITY_CFG(MC_STREAMID_OVERRIDE_CFG_ ## name), \
641*50e91633SAnthony Zhou 		.val = 0x00000000U, \
6424122151fSVarun Wadekar 	}
6434122151fSVarun Wadekar 
644986e333dSPritesh Raithatha #define smmu_make_gnsr0_sec_cfg(name) \
645986e333dSPritesh Raithatha 	{ \
646c459206dSPritesh Raithatha 		.reg = TEGRA_SMMU0_BASE + SMMU_GNSR0_ ## name, \
647*50e91633SAnthony Zhou 		.val = 0x00000000U, \
648986e333dSPritesh Raithatha 	}
649986e333dSPritesh Raithatha 
650986e333dSPritesh Raithatha /*
651986e333dSPritesh Raithatha  * On ARM-SMMU, conditional offset to access secure aliases of non-secure registers
652986e333dSPritesh Raithatha  * is 0x400. So, add it to register address
653986e333dSPritesh Raithatha  */
654986e333dSPritesh Raithatha #define smmu_make_gnsr0_nsec_cfg(name) \
655986e333dSPritesh Raithatha 	{ \
656*50e91633SAnthony Zhou 		.reg = TEGRA_SMMU0_BASE + 0x400U + SMMU_GNSR0_ ## name, \
657*50e91633SAnthony Zhou 		.val = 0x00000000U, \
658986e333dSPritesh Raithatha 	}
659986e333dSPritesh Raithatha 
660986e333dSPritesh Raithatha #define smmu_make_gnsr0_smr_cfg(n) \
661986e333dSPritesh Raithatha 	{ \
662c459206dSPritesh Raithatha 		.reg = TEGRA_SMMU0_BASE + SMMU_GNSR0_SMR ## n, \
663*50e91633SAnthony Zhou 		.val = 0x00000000U, \
664986e333dSPritesh Raithatha 	}
665986e333dSPritesh Raithatha 
666986e333dSPritesh Raithatha #define smmu_make_gnsr0_s2cr_cfg(n) \
667986e333dSPritesh Raithatha 	{ \
668c459206dSPritesh Raithatha 		.reg = TEGRA_SMMU0_BASE + SMMU_GNSR0_S2CR ## n, \
669*50e91633SAnthony Zhou 		.val = 0x00000000U, \
670986e333dSPritesh Raithatha 	}
671986e333dSPritesh Raithatha 
672986e333dSPritesh Raithatha #define smmu_make_gnsr1_cbar_cfg(n) \
673986e333dSPritesh Raithatha 	{ \
674*50e91633SAnthony Zhou 		.reg = TEGRA_SMMU0_BASE + (1U << PGSHIFT) + SMMU_GNSR1_CBAR ## n, \
675*50e91633SAnthony Zhou 		.val = 0x00000000U, \
676986e333dSPritesh Raithatha 	}
677986e333dSPritesh Raithatha 
678986e333dSPritesh Raithatha #define smmu_make_gnsr1_cba2r_cfg(n) \
679986e333dSPritesh Raithatha 	{ \
680*50e91633SAnthony Zhou 		.reg = TEGRA_SMMU0_BASE + (1U << PGSHIFT) + SMMU_GNSR1_CBA2R ## n, \
681*50e91633SAnthony Zhou 		.val = 0x00000000U, \
682986e333dSPritesh Raithatha 	}
683986e333dSPritesh Raithatha 
684986e333dSPritesh Raithatha #define make_smmu_cb_cfg(name, n) \
685986e333dSPritesh Raithatha 	{ \
686c459206dSPritesh Raithatha 		.reg = TEGRA_SMMU0_BASE + (CB_SIZE >> 1) + (n * (1 << PGSHIFT)) \
687986e333dSPritesh Raithatha 			+ SMMU_CBn_ ## name, \
688*50e91633SAnthony Zhou 		.val = 0x00000000U, \
689986e333dSPritesh Raithatha 	}
690986e333dSPritesh Raithatha 
691986e333dSPritesh Raithatha #define smmu_make_smrg_group(n)	\
692986e333dSPritesh Raithatha 	smmu_make_gnsr0_smr_cfg(n),	\
693986e333dSPritesh Raithatha 	smmu_make_gnsr0_s2cr_cfg(n),	\
694986e333dSPritesh Raithatha 	smmu_make_gnsr1_cbar_cfg(n),	\
695986e333dSPritesh Raithatha 	smmu_make_gnsr1_cba2r_cfg(n)	/* don't put "," here. */
696986e333dSPritesh Raithatha 
697986e333dSPritesh Raithatha #define smmu_make_cb_group(n)		\
698986e333dSPritesh Raithatha 	make_smmu_cb_cfg(SCTLR, n),	\
699986e333dSPritesh Raithatha 	make_smmu_cb_cfg(TCR2, n),	\
700986e333dSPritesh Raithatha 	make_smmu_cb_cfg(TTBR0_LO, n),	\
701986e333dSPritesh Raithatha 	make_smmu_cb_cfg(TTBR0_HI, n),	\
702986e333dSPritesh Raithatha 	make_smmu_cb_cfg(TCR, n),	\
703986e333dSPritesh Raithatha 	make_smmu_cb_cfg(PRRR_MAIR0, n),\
704986e333dSPritesh Raithatha 	make_smmu_cb_cfg(FSR, n),	\
705986e333dSPritesh Raithatha 	make_smmu_cb_cfg(FAR_LO, n),	\
706986e333dSPritesh Raithatha 	make_smmu_cb_cfg(FAR_HI, n),	\
707986e333dSPritesh Raithatha 	make_smmu_cb_cfg(FSYNR0, n)	/* don't put "," here. */
708986e333dSPritesh Raithatha 
709986e333dSPritesh Raithatha #define smmu_bypass_cfg \
710986e333dSPritesh Raithatha 	{ \
711986e333dSPritesh Raithatha 		.reg = TEGRA_MC_BASE + MC_SMMU_BYPASS_CONFIG, \
712*50e91633SAnthony Zhou 		.val = 0x00000000U, \
713986e333dSPritesh Raithatha 	}
714986e333dSPritesh Raithatha 
715986e333dSPritesh Raithatha #define _START_OF_TABLE_ \
716986e333dSPritesh Raithatha 	{ \
717*50e91633SAnthony Zhou 		.reg = 0xCAFE05C7U, \
718*50e91633SAnthony Zhou 		.val = 0x00000000U, \
719986e333dSPritesh Raithatha 	}
720986e333dSPritesh Raithatha 
721986e333dSPritesh Raithatha #define _END_OF_TABLE_ \
722986e333dSPritesh Raithatha 	{ \
723*50e91633SAnthony Zhou 		.reg = 0xFFFFFFFFU, \
724*50e91633SAnthony Zhou 		.val = 0xFFFFFFFFU, \
725986e333dSPritesh Raithatha 	}
726986e333dSPritesh Raithatha 
727986e333dSPritesh Raithatha 
7284122151fSVarun Wadekar void tegra_smmu_init(void);
72968c7de6fSVarun Wadekar void tegra_smmu_save_context(uint64_t smmu_ctx_addr);
730986e333dSPritesh Raithatha smmu_regs_t *plat_get_smmu_ctx(void);
7314122151fSVarun Wadekar 
7324122151fSVarun Wadekar #endif /*__SMMU_H */
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