1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef PMC_H 8 #define PMC_H 9 10 #include <lib/mmio.h> 11 #include <lib/utils_def.h> 12 #include <stdbool.h> 13 14 #include <tegra_def.h> 15 16 #define PMC_CONFIG U(0x0) 17 #define PMC_DPD_ENABLE_0 U(0x24) 18 #define PMC_PWRGATE_STATUS U(0x38) 19 #define PMC_PWRGATE_TOGGLE U(0x30) 20 #define PMC_SECURE_SCRATCH0 U(0xb0) 21 #define PMC_SECURE_SCRATCH5 U(0xc4) 22 #define PMC_CRYPTO_OP_0 U(0xf4) 23 #define PMC_TOGGLE_START U(0x100) 24 #define PMC_SCRATCH39 U(0x138) 25 #define PMC_SECURE_SCRATCH6 U(0x224) 26 #define PMC_SECURE_SCRATCH7 U(0x228) 27 #define PMC_SECURE_DISABLE2 U(0x2c4) 28 #define PMC_SECURE_DISABLE2_WRITE22_ON (U(1) << 28) 29 #define PMC_SECURE_SCRATCH8 U(0x300) 30 #define PMC_SECURE_SCRATCH79 U(0x41c) 31 #define PMC_FUSE_CONTROL_0 U(0x450) 32 #define PMC_SECURE_SCRATCH22 U(0x338) 33 #define PMC_SECURE_DISABLE3 U(0x2d8) 34 #define PMC_SECURE_DISABLE3_WRITE34_ON (U(1) << 20) 35 #define PMC_SECURE_DISABLE3_WRITE35_ON (U(1) << 22) 36 #define PMC_SECURE_SCRATCH34 U(0x368) 37 #define PMC_SECURE_SCRATCH35 U(0x36c) 38 #define PMC_SECURE_SCRATCH80 U(0xa98) 39 #define PMC_SECURE_SCRATCH119 U(0xb34) 40 #define PMC_SCRATCH201 U(0x844) 41 42 static inline uint32_t tegra_pmc_read_32(uint32_t off) 43 { 44 return mmio_read_32(TEGRA_PMC_BASE + off); 45 } 46 47 static inline void tegra_pmc_write_32(uint32_t off, uint32_t val) 48 { 49 mmio_write_32(TEGRA_PMC_BASE + off, val); 50 } 51 52 void tegra_pmc_cpu_on(int32_t cpu); 53 void tegra_pmc_cpu_setup(uint64_t reset_addr); 54 bool tegra_pmc_is_last_on_cpu(void); 55 void tegra_pmc_lock_cpu_vectors(void); 56 __dead2 void tegra_pmc_system_reset(void); 57 58 #endif /* PMC_H */ 59