xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/pmc.h (revision 50e91633eeafdecb6b15503c0379b1a07e1e2c20)
108438e24SVarun Wadekar /*
2*50e91633SAnthony Zhou  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
308438e24SVarun Wadekar  *
408438e24SVarun Wadekar  * Redistribution and use in source and binary forms, with or without
508438e24SVarun Wadekar  * modification, are permitted provided that the following conditions are met:
608438e24SVarun Wadekar  *
708438e24SVarun Wadekar  * Redistributions of source code must retain the above copyright notice, this
808438e24SVarun Wadekar  * list of conditions and the following disclaimer.
908438e24SVarun Wadekar  *
1008438e24SVarun Wadekar  * Redistributions in binary form must reproduce the above copyright notice,
1108438e24SVarun Wadekar  * this list of conditions and the following disclaimer in the documentation
1208438e24SVarun Wadekar  * and/or other materials provided with the distribution.
1308438e24SVarun Wadekar  *
1408438e24SVarun Wadekar  * Neither the name of ARM nor the names of its contributors may be used
1508438e24SVarun Wadekar  * to endorse or promote products derived from this software without specific
1608438e24SVarun Wadekar  * prior written permission.
1708438e24SVarun Wadekar  *
1808438e24SVarun Wadekar  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1908438e24SVarun Wadekar  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2008438e24SVarun Wadekar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2108438e24SVarun Wadekar  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
2208438e24SVarun Wadekar  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2308438e24SVarun Wadekar  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2408438e24SVarun Wadekar  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2508438e24SVarun Wadekar  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2608438e24SVarun Wadekar  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2708438e24SVarun Wadekar  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2808438e24SVarun Wadekar  * POSSIBILITY OF SUCH DAMAGE.
2908438e24SVarun Wadekar  */
3008438e24SVarun Wadekar 
3108438e24SVarun Wadekar #ifndef __PMC_H__
3208438e24SVarun Wadekar #define __PMC_H__
3308438e24SVarun Wadekar 
3408438e24SVarun Wadekar #include <mmio.h>
3508438e24SVarun Wadekar #include <tegra_def.h>
3608438e24SVarun Wadekar 
37*50e91633SAnthony Zhou #define PMC_CONFIG				0x0U
38*50e91633SAnthony Zhou #define PMC_PWRGATE_STATUS			0x38U
39*50e91633SAnthony Zhou #define PMC_PWRGATE_TOGGLE			0x30U
40*50e91633SAnthony Zhou #define  PMC_TOGGLE_START			0x100U
41*50e91633SAnthony Zhou #define PMC_SCRATCH39				0x138U
42*50e91633SAnthony Zhou #define PMC_SECURE_DISABLE2			0x2c4U
43*50e91633SAnthony Zhou #define  PMC_SECURE_DISABLE2_WRITE22_ON		(1U << 28)
44*50e91633SAnthony Zhou #define PMC_SECURE_SCRATCH22			0x338U
45*50e91633SAnthony Zhou #define PMC_SECURE_DISABLE3			0x2d8U
46*50e91633SAnthony Zhou #define  PMC_SECURE_DISABLE3_WRITE34_ON		(1U << 20)
47*50e91633SAnthony Zhou #define  PMC_SECURE_DISABLE3_WRITE35_ON		(1U << 22)
48*50e91633SAnthony Zhou #define PMC_SECURE_SCRATCH34			0x368U
49*50e91633SAnthony Zhou #define PMC_SECURE_SCRATCH35			0x36cU
5008438e24SVarun Wadekar 
5108438e24SVarun Wadekar static inline uint32_t tegra_pmc_read_32(uint32_t off)
5208438e24SVarun Wadekar {
5308438e24SVarun Wadekar 	return mmio_read_32(TEGRA_PMC_BASE + off);
5408438e24SVarun Wadekar }
5508438e24SVarun Wadekar 
5608438e24SVarun Wadekar static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
5708438e24SVarun Wadekar {
5808438e24SVarun Wadekar 	mmio_write_32(TEGRA_PMC_BASE + off, val);
5908438e24SVarun Wadekar }
6008438e24SVarun Wadekar 
6108438e24SVarun Wadekar void tegra_pmc_cpu_setup(uint64_t reset_addr);
6208438e24SVarun Wadekar void tegra_pmc_lock_cpu_vectors(void);
6308438e24SVarun Wadekar void tegra_pmc_cpu_on(int cpu);
6408438e24SVarun Wadekar __dead2 void tegra_pmc_system_reset(void);
6508438e24SVarun Wadekar 
6608438e24SVarun Wadekar #endif /* __PMC_H__ */
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