108438e24SVarun Wadekar /* 2a7a63e0eSVarun Wadekar * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 308438e24SVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 508438e24SVarun Wadekar */ 608438e24SVarun Wadekar 7c3cf06f1SAntonio Nino Diaz #ifndef PMC_H 8c3cf06f1SAntonio Nino Diaz #define PMC_H 908438e24SVarun Wadekar 1009d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 1109d40e0eSAntonio Nino Diaz #include <lib/utils_def.h> 12a7a63e0eSVarun Wadekar #include <stdbool.h> 1309d40e0eSAntonio Nino Diaz 1408438e24SVarun Wadekar #include <tegra_def.h> 1508438e24SVarun Wadekar 1631d97dc2SAnthony Zhou #define PMC_CONFIG U(0x0) 1731d97dc2SAnthony Zhou #define PMC_PWRGATE_STATUS U(0x38) 1831d97dc2SAnthony Zhou #define PMC_PWRGATE_TOGGLE U(0x30) 1931d97dc2SAnthony Zhou #define PMC_TOGGLE_START U(0x100) 2031d97dc2SAnthony Zhou #define PMC_SCRATCH39 U(0x138) 2131d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE2 U(0x2c4) 2231d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE2_WRITE22_ON (U(1) << 28) 2331d97dc2SAnthony Zhou #define PMC_SECURE_SCRATCH22 U(0x338) 2431d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE3 U(0x2d8) 2531d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE3_WRITE34_ON (U(1) << 20) 2631d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE3_WRITE35_ON (U(1) << 22) 2731d97dc2SAnthony Zhou #define PMC_SECURE_SCRATCH34 U(0x368) 2831d97dc2SAnthony Zhou #define PMC_SECURE_SCRATCH35 U(0x36c) 29*3ca3c27cSVarun Wadekar #define PMC_SCRATCH201 U(0x844) 3008438e24SVarun Wadekar 3108438e24SVarun Wadekar static inline uint32_t tegra_pmc_read_32(uint32_t off) 3208438e24SVarun Wadekar { 3308438e24SVarun Wadekar return mmio_read_32(TEGRA_PMC_BASE + off); 3408438e24SVarun Wadekar } 3508438e24SVarun Wadekar 3608438e24SVarun Wadekar static inline void tegra_pmc_write_32(uint32_t off, uint32_t val) 3708438e24SVarun Wadekar { 3808438e24SVarun Wadekar mmio_write_32(TEGRA_PMC_BASE + off, val); 3908438e24SVarun Wadekar } 4008438e24SVarun Wadekar 4131d97dc2SAnthony Zhou void tegra_pmc_cpu_on(int32_t cpu); 42a7a63e0eSVarun Wadekar void tegra_pmc_cpu_setup(uint64_t reset_addr); 43a7a63e0eSVarun Wadekar bool tegra_pmc_is_last_on_cpu(void); 44a7a63e0eSVarun Wadekar void tegra_pmc_lock_cpu_vectors(void); 4508438e24SVarun Wadekar __dead2 void tegra_pmc_system_reset(void); 4608438e24SVarun Wadekar 47c3cf06f1SAntonio Nino Diaz #endif /* PMC_H */ 48