xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/pmc.h (revision 31d97dc2d876d1948963e4f4e6ef3b549dc98e18)
108438e24SVarun Wadekar /*
250e91633SAnthony Zhou  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
308438e24SVarun Wadekar  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
508438e24SVarun Wadekar  */
608438e24SVarun Wadekar 
708438e24SVarun Wadekar #ifndef __PMC_H__
808438e24SVarun Wadekar #define __PMC_H__
908438e24SVarun Wadekar 
1008438e24SVarun Wadekar #include <mmio.h>
1108438e24SVarun Wadekar #include <tegra_def.h>
12*31d97dc2SAnthony Zhou #include <utils_def.h>
1308438e24SVarun Wadekar 
14*31d97dc2SAnthony Zhou #define PMC_CONFIG				U(0x0)
15*31d97dc2SAnthony Zhou #define PMC_PWRGATE_STATUS			U(0x38)
16*31d97dc2SAnthony Zhou #define PMC_PWRGATE_TOGGLE			U(0x30)
17*31d97dc2SAnthony Zhou #define  PMC_TOGGLE_START			U(0x100)
18*31d97dc2SAnthony Zhou #define PMC_SCRATCH39				U(0x138)
19*31d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE2			U(0x2c4)
20*31d97dc2SAnthony Zhou #define  PMC_SECURE_DISABLE2_WRITE22_ON		(U(1) << 28)
21*31d97dc2SAnthony Zhou #define PMC_SECURE_SCRATCH22			U(0x338)
22*31d97dc2SAnthony Zhou #define PMC_SECURE_DISABLE3			U(0x2d8)
23*31d97dc2SAnthony Zhou #define  PMC_SECURE_DISABLE3_WRITE34_ON		(U(1) << 20)
24*31d97dc2SAnthony Zhou #define  PMC_SECURE_DISABLE3_WRITE35_ON		(U(1) << 22)
25*31d97dc2SAnthony Zhou #define PMC_SECURE_SCRATCH34			U(0x368)
26*31d97dc2SAnthony Zhou #define PMC_SECURE_SCRATCH35			U(0x36c)
2708438e24SVarun Wadekar 
2808438e24SVarun Wadekar static inline uint32_t tegra_pmc_read_32(uint32_t off)
2908438e24SVarun Wadekar {
3008438e24SVarun Wadekar 	return mmio_read_32(TEGRA_PMC_BASE + off);
3108438e24SVarun Wadekar }
3208438e24SVarun Wadekar 
3308438e24SVarun Wadekar static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
3408438e24SVarun Wadekar {
3508438e24SVarun Wadekar 	mmio_write_32(TEGRA_PMC_BASE + off, val);
3608438e24SVarun Wadekar }
3708438e24SVarun Wadekar 
3808438e24SVarun Wadekar void tegra_pmc_cpu_setup(uint64_t reset_addr);
3908438e24SVarun Wadekar void tegra_pmc_lock_cpu_vectors(void);
40*31d97dc2SAnthony Zhou void tegra_pmc_cpu_on(int32_t cpu);
4108438e24SVarun Wadekar __dead2 void tegra_pmc_system_reset(void);
4208438e24SVarun Wadekar 
4308438e24SVarun Wadekar #endif /* __PMC_H__ */
44