xref: /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/pmc.h (revision 08438e24e10504642634da9ee3dde794ac6fa8f0)
1*08438e24SVarun Wadekar /*
2*08438e24SVarun Wadekar  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3*08438e24SVarun Wadekar  *
4*08438e24SVarun Wadekar  * Redistribution and use in source and binary forms, with or without
5*08438e24SVarun Wadekar  * modification, are permitted provided that the following conditions are met:
6*08438e24SVarun Wadekar  *
7*08438e24SVarun Wadekar  * Redistributions of source code must retain the above copyright notice, this
8*08438e24SVarun Wadekar  * list of conditions and the following disclaimer.
9*08438e24SVarun Wadekar  *
10*08438e24SVarun Wadekar  * Redistributions in binary form must reproduce the above copyright notice,
11*08438e24SVarun Wadekar  * this list of conditions and the following disclaimer in the documentation
12*08438e24SVarun Wadekar  * and/or other materials provided with the distribution.
13*08438e24SVarun Wadekar  *
14*08438e24SVarun Wadekar  * Neither the name of ARM nor the names of its contributors may be used
15*08438e24SVarun Wadekar  * to endorse or promote products derived from this software without specific
16*08438e24SVarun Wadekar  * prior written permission.
17*08438e24SVarun Wadekar  *
18*08438e24SVarun Wadekar  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*08438e24SVarun Wadekar  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*08438e24SVarun Wadekar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*08438e24SVarun Wadekar  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*08438e24SVarun Wadekar  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*08438e24SVarun Wadekar  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*08438e24SVarun Wadekar  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*08438e24SVarun Wadekar  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*08438e24SVarun Wadekar  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*08438e24SVarun Wadekar  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*08438e24SVarun Wadekar  * POSSIBILITY OF SUCH DAMAGE.
29*08438e24SVarun Wadekar  */
30*08438e24SVarun Wadekar 
31*08438e24SVarun Wadekar #ifndef __PMC_H__
32*08438e24SVarun Wadekar #define __PMC_H__
33*08438e24SVarun Wadekar 
34*08438e24SVarun Wadekar #include <mmio.h>
35*08438e24SVarun Wadekar #include <tegra_def.h>
36*08438e24SVarun Wadekar 
37*08438e24SVarun Wadekar #define PMC_CONFIG				0x0
38*08438e24SVarun Wadekar #define PMC_PWRGATE_STATUS			0x38
39*08438e24SVarun Wadekar #define PMC_PWRGATE_TOGGLE			0x30
40*08438e24SVarun Wadekar #define  PMC_TOGGLE_START			0x100
41*08438e24SVarun Wadekar #define PMC_SCRATCH39				0x138
42*08438e24SVarun Wadekar #define PMC_SECURE_DISABLE2			0x2c4
43*08438e24SVarun Wadekar #define  PMC_SECURE_DISABLE2_WRITE22_ON		(1 << 28)
44*08438e24SVarun Wadekar #define PMC_SECURE_SCRATCH22			0x338
45*08438e24SVarun Wadekar #define PMC_SECURE_DISABLE3			0x2d8
46*08438e24SVarun Wadekar #define  PMC_SECURE_DISABLE3_WRITE34_ON		(1 << 20)
47*08438e24SVarun Wadekar #define  PMC_SECURE_DISABLE3_WRITE35_ON		(1 << 22)
48*08438e24SVarun Wadekar #define PMC_SECURE_SCRATCH34			0x368
49*08438e24SVarun Wadekar #define PMC_SECURE_SCRATCH35			0x36c
50*08438e24SVarun Wadekar 
51*08438e24SVarun Wadekar static inline uint32_t tegra_pmc_read_32(uint32_t off)
52*08438e24SVarun Wadekar {
53*08438e24SVarun Wadekar 	return mmio_read_32(TEGRA_PMC_BASE + off);
54*08438e24SVarun Wadekar }
55*08438e24SVarun Wadekar 
56*08438e24SVarun Wadekar static inline void tegra_pmc_write_32(uint32_t off, uint32_t val)
57*08438e24SVarun Wadekar {
58*08438e24SVarun Wadekar 	mmio_write_32(TEGRA_PMC_BASE + off, val);
59*08438e24SVarun Wadekar }
60*08438e24SVarun Wadekar 
61*08438e24SVarun Wadekar void tegra_pmc_cpu_setup(uint64_t reset_addr);
62*08438e24SVarun Wadekar void tegra_pmc_lock_cpu_vectors(void);
63*08438e24SVarun Wadekar void tegra_pmc_cpu_on(int cpu);
64*08438e24SVarun Wadekar __dead2 void tegra_pmc_system_reset(void);
65*08438e24SVarun Wadekar 
66*08438e24SVarun Wadekar #endif /* __PMC_H__ */
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