1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MEMCTRL_V2_H 8 #define MEMCTRL_V2_H 9 10 #include <tegra_def.h> 11 12 #ifndef __ASSEMBLY__ 13 14 #include <lib/mmio.h> 15 #include <stdint.h> 16 17 /******************************************************************************* 18 * Structure to hold the transaction override settings to use to override 19 * client inputs 20 ******************************************************************************/ 21 typedef struct mc_txn_override_cfg { 22 uint32_t offset; 23 uint8_t cgid_tag; 24 } mc_txn_override_cfg_t; 25 26 #define mc_make_txn_override_cfg(off, val) \ 27 { \ 28 .offset = MC_TXN_OVERRIDE_CONFIG_ ## off, \ 29 .cgid_tag = MC_TXN_OVERRIDE_ ## val \ 30 } 31 32 /******************************************************************************* 33 * Structure to hold the Stream ID to use to override client inputs 34 ******************************************************************************/ 35 typedef struct mc_streamid_override_cfg { 36 uint32_t offset; 37 uint8_t stream_id; 38 } mc_streamid_override_cfg_t; 39 40 /******************************************************************************* 41 * Structure to hold the Stream ID Security Configuration settings 42 ******************************************************************************/ 43 typedef struct mc_streamid_security_cfg { 44 char *name; 45 uint32_t offset; 46 int override_enable; 47 int override_client_inputs; 48 int override_client_ns_flag; 49 } mc_streamid_security_cfg_t; 50 51 #define OVERRIDE_DISABLE 1U 52 #define OVERRIDE_ENABLE 0U 53 #define CLIENT_FLAG_SECURE 0U 54 #define CLIENT_FLAG_NON_SECURE 1U 55 #define CLIENT_INPUTS_OVERRIDE 1U 56 #define CLIENT_INPUTS_NO_OVERRIDE 0U 57 /******************************************************************************* 58 * StreamID to indicate no SMMU translations (requests to be steered on the 59 * SMMU bypass path) 60 ******************************************************************************/ 61 #define MC_STREAM_ID_MAX 0x7FU 62 63 /******************************************************************************* 64 * Memory Controller SMMU Bypass config register 65 ******************************************************************************/ 66 #define MC_SMMU_BYPASS_CONFIG 0x1820U 67 #define MC_SMMU_BYPASS_CTRL_MASK 0x3U 68 #define MC_SMMU_BYPASS_CTRL_SHIFT 0U 69 #define MC_SMMU_CTRL_TBU_BYPASS_ALL (0U << MC_SMMU_BYPASS_CTRL_SHIFT) 70 #define MC_SMMU_CTRL_TBU_RSVD (1U << MC_SMMU_BYPASS_CTRL_SHIFT) 71 #define MC_SMMU_CTRL_TBU_BYPASS_SPL_STREAMID (2U << MC_SMMU_BYPASS_CTRL_SHIFT) 72 #define MC_SMMU_CTRL_TBU_BYPASS_NONE (3U << MC_SMMU_BYPASS_CTRL_SHIFT) 73 #define MC_SMMU_BYPASS_CONFIG_WRITE_ACCESS_BIT (1U << 31) 74 #define MC_SMMU_BYPASS_CONFIG_SETTINGS (MC_SMMU_BYPASS_CONFIG_WRITE_ACCESS_BIT | \ 75 MC_SMMU_CTRL_TBU_BYPASS_SPL_STREAMID) 76 77 #define mc_make_sec_cfg(off, ns, ovrrd, access) \ 78 { \ 79 .name = # off, \ 80 .offset = MC_STREAMID_OVERRIDE_TO_SECURITY_CFG( \ 81 MC_STREAMID_OVERRIDE_CFG_ ## off), \ 82 .override_client_ns_flag = CLIENT_FLAG_ ## ns, \ 83 .override_client_inputs = CLIENT_INPUTS_ ## ovrrd, \ 84 .override_enable = OVERRIDE_ ## access \ 85 } 86 87 /******************************************************************************* 88 * Structure to hold Memory Controller's Configuration settings 89 ******************************************************************************/ 90 typedef struct tegra_mc_settings { 91 const uint32_t *streamid_override_cfg; 92 uint32_t num_streamid_override_cfgs; 93 const mc_streamid_security_cfg_t *streamid_security_cfg; 94 uint32_t num_streamid_security_cfgs; 95 const mc_txn_override_cfg_t *txn_override_cfg; 96 uint32_t num_txn_override_cfgs; 97 void (*reconfig_mss_clients)(void); 98 void (*set_txn_overrides)(void); 99 } tegra_mc_settings_t; 100 101 static inline uint32_t tegra_mc_read_32(uint32_t off) 102 { 103 return mmio_read_32(TEGRA_MC_BASE + off); 104 } 105 106 static inline void tegra_mc_write_32(uint32_t off, uint32_t val) 107 { 108 mmio_write_32(TEGRA_MC_BASE + off, val); 109 } 110 111 static inline uint32_t tegra_mc_streamid_read_32(uint32_t off) 112 { 113 return mmio_read_32(TEGRA_MC_STREAMID_BASE + off); 114 } 115 116 static inline void tegra_mc_streamid_write_32(uint32_t off, uint32_t val) 117 { 118 mmio_write_32(TEGRA_MC_STREAMID_BASE + off, val); 119 } 120 121 #define mc_set_pcfifo_unordered_boot_so_mss(id, client) \ 122 ((uint32_t)~MC_PCFIFO_CLIENT_CONFIG##id##_PCFIFO_##client##_MASK | \ 123 MC_PCFIFO_CLIENT_CONFIG##id##_PCFIFO_##client##_UNORDERED) 124 125 #define mc_set_pcfifo_ordered_boot_so_mss(id, client) \ 126 MC_PCFIFO_CLIENT_CONFIG##id##_PCFIFO_##client##_ORDERED 127 128 #define mc_set_tsa_passthrough(client) \ 129 { \ 130 mmio_write_32(TEGRA_TSA_BASE + TSA_CONFIG_STATIC0_CSW_##client, \ 131 (TSA_CONFIG_STATIC0_CSW_##client##_RESET & \ 132 (uint32_t)~TSA_CONFIG_CSW_MEMTYPE_OVERRIDE_MASK) | \ 133 (uint32_t)TSA_CONFIG_CSW_MEMTYPE_OVERRIDE_PASTHRU); \ 134 } 135 136 #define mc_set_tsa_w_passthrough(client) \ 137 { \ 138 mmio_write_32(TEGRA_TSA_BASE + TSA_CONFIG_STATIC0_CSW_##client, \ 139 (TSA_CONFIG_STATIC0_CSW_RESET_W & \ 140 (uint32_t)~TSA_CONFIG_CSW_MEMTYPE_OVERRIDE_MASK) | \ 141 (uint32_t)TSA_CONFIG_CSW_MEMTYPE_OVERRIDE_PASTHRU); \ 142 } 143 144 #define mc_set_tsa_r_passthrough(client) \ 145 { \ 146 mmio_write_32(TEGRA_TSA_BASE + TSA_CONFIG_STATIC0_CSR_##client, \ 147 (TSA_CONFIG_STATIC0_CSR_RESET_R & \ 148 (uint32_t)~TSA_CONFIG_CSW_MEMTYPE_OVERRIDE_MASK) | \ 149 (uint32_t)TSA_CONFIG_CSW_MEMTYPE_OVERRIDE_PASTHRU); \ 150 } 151 152 #define mc_set_txn_override(client, normal_axi_id, so_dev_axi_id, normal_override, so_dev_override) \ 153 { \ 154 tegra_mc_write_32(MC_TXN_OVERRIDE_CONFIG_##client, \ 155 MC_TXN_OVERRIDE_##normal_axi_id | \ 156 MC_TXN_OVERRIDE_CONFIG_COH_PATH_##so_dev_override##_SO_DEV | \ 157 MC_TXN_OVERRIDE_CONFIG_COH_PATH_##normal_override##_NORMAL | \ 158 MC_TXN_OVERRIDE_CONFIG_CGID_##so_dev_axi_id); \ 159 } 160 161 /******************************************************************************* 162 * Handler to read memory configuration settings 163 * 164 * Implemented by SoCs under tegra/soc/txxx 165 ******************************************************************************/ 166 tegra_mc_settings_t *tegra_get_mc_settings(void); 167 168 /******************************************************************************* 169 * Handler to program the scratch registers with TZDRAM settings for the 170 * resume firmware. 171 * 172 * Implemented by SoCs under tegra/soc/txxx 173 ******************************************************************************/ 174 void plat_memctrl_tzdram_setup(uint64_t phys_base, uint64_t size_in_bytes); 175 176 #endif /* __ASSEMBLY__ */ 177 178 #endif /* MEMCTRL_V2_H */ 179