1 /* 2 * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __MCE_H__ 32 #define __MCE_H__ 33 34 #include <mmio.h> 35 #include <tegra_def.h> 36 37 /******************************************************************************* 38 * MCE commands 39 ******************************************************************************/ 40 typedef enum mce_cmd { 41 MCE_CMD_ENTER_CSTATE = 0U, 42 MCE_CMD_UPDATE_CSTATE_INFO = 1U, 43 MCE_CMD_UPDATE_CROSSOVER_TIME = 2U, 44 MCE_CMD_READ_CSTATE_STATS = 3U, 45 MCE_CMD_WRITE_CSTATE_STATS = 4U, 46 MCE_CMD_IS_SC7_ALLOWED = 5U, 47 MCE_CMD_ONLINE_CORE = 6U, 48 MCE_CMD_CC3_CTRL = 7U, 49 MCE_CMD_ECHO_DATA = 8U, 50 MCE_CMD_READ_VERSIONS = 9U, 51 MCE_CMD_ENUM_FEATURES = 10U, 52 MCE_CMD_ROC_FLUSH_CACHE_TRBITS = 11U, 53 MCE_CMD_ENUM_READ_MCA = 12U, 54 MCE_CMD_ENUM_WRITE_MCA = 13U, 55 MCE_CMD_ROC_FLUSH_CACHE = 14U, 56 MCE_CMD_ROC_CLEAN_CACHE = 15U, 57 MCE_CMD_ENABLE_LATIC = 16U, 58 MCE_CMD_UNCORE_PERFMON_REQ = 17U, 59 MCE_CMD_MISC_CCPLEX = 18U, 60 MCE_CMD_IS_CCX_ALLOWED = 0xFEU, 61 MCE_CMD_MAX = 0xFFU, 62 } mce_cmd_t; 63 64 #define MCE_CMD_MASK 0xFFU 65 66 /******************************************************************************* 67 * Timeout value used to powerdown a core 68 ******************************************************************************/ 69 #define MCE_CORE_SLEEP_TIME_INFINITE 0xFFFFFFFFU 70 71 /******************************************************************************* 72 * Struct to prepare UPDATE_CSTATE_INFO request 73 ******************************************************************************/ 74 typedef struct mce_cstate_info { 75 /* cluster cstate value */ 76 uint32_t cluster; 77 /* ccplex cstate value */ 78 uint32_t ccplex; 79 /* system cstate value */ 80 uint32_t system; 81 /* force system state? */ 82 uint8_t system_state_force; 83 /* wake mask value */ 84 uint32_t wake_mask; 85 /* update the wake mask? */ 86 uint8_t update_wake_mask; 87 } mce_cstate_info_t; 88 89 /* public interfaces */ 90 int mce_command_handler(mce_cmd_t cmd, uint64_t arg0, uint64_t arg1, 91 uint64_t arg2); 92 int mce_update_reset_vector(void); 93 int mce_update_gsc_videomem(void); 94 int mce_update_gsc_tzdram(void); 95 int mce_update_gsc_tzram(void); 96 __dead2 void mce_enter_ccplex_state(uint32_t state_idx); 97 void mce_update_cstate_info(mce_cstate_info_t *cstate); 98 void mce_verify_firmware_version(void); 99 100 #endif /* __MCE_H__ */ 101