1*06060028SVarun Wadekar /* 2*06060028SVarun Wadekar * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3*06060028SVarun Wadekar * 4*06060028SVarun Wadekar * Redistribution and use in source and binary forms, with or without 5*06060028SVarun Wadekar * modification, are permitted provided that the following conditions are met: 6*06060028SVarun Wadekar * 7*06060028SVarun Wadekar * Redistributions of source code must retain the above copyright notice, this 8*06060028SVarun Wadekar * list of conditions and the following disclaimer. 9*06060028SVarun Wadekar * 10*06060028SVarun Wadekar * Redistributions in binary form must reproduce the above copyright notice, 11*06060028SVarun Wadekar * this list of conditions and the following disclaimer in the documentation 12*06060028SVarun Wadekar * and/or other materials provided with the distribution. 13*06060028SVarun Wadekar * 14*06060028SVarun Wadekar * Neither the name of ARM nor the names of its contributors may be used 15*06060028SVarun Wadekar * to endorse or promote products derived from this software without specific 16*06060028SVarun Wadekar * prior written permission. 17*06060028SVarun Wadekar * 18*06060028SVarun Wadekar * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*06060028SVarun Wadekar * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*06060028SVarun Wadekar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*06060028SVarun Wadekar * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*06060028SVarun Wadekar * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*06060028SVarun Wadekar * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*06060028SVarun Wadekar * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*06060028SVarun Wadekar * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*06060028SVarun Wadekar * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*06060028SVarun Wadekar * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*06060028SVarun Wadekar * POSSIBILITY OF SUCH DAMAGE. 29*06060028SVarun Wadekar */ 30*06060028SVarun Wadekar 31*06060028SVarun Wadekar #ifndef __MCE_H__ 32*06060028SVarun Wadekar #define __MCE_H__ 33*06060028SVarun Wadekar 34*06060028SVarun Wadekar #include <mmio.h> 35*06060028SVarun Wadekar #include <tegra_def.h> 36*06060028SVarun Wadekar 37*06060028SVarun Wadekar /******************************************************************************* 38*06060028SVarun Wadekar * MCE commands 39*06060028SVarun Wadekar ******************************************************************************/ 40*06060028SVarun Wadekar typedef enum mce_cmd { 41*06060028SVarun Wadekar MCE_CMD_ENTER_CSTATE = 0, 42*06060028SVarun Wadekar MCE_CMD_UPDATE_CSTATE_INFO = 1, 43*06060028SVarun Wadekar MCE_CMD_UPDATE_CROSSOVER_TIME = 2, 44*06060028SVarun Wadekar MCE_CMD_READ_CSTATE_STATS = 3, 45*06060028SVarun Wadekar MCE_CMD_WRITE_CSTATE_STATS = 4, 46*06060028SVarun Wadekar MCE_CMD_IS_SC7_ALLOWED = 5, 47*06060028SVarun Wadekar MCE_CMD_ONLINE_CORE = 6, 48*06060028SVarun Wadekar MCE_CMD_CC3_CTRL = 7, 49*06060028SVarun Wadekar MCE_CMD_ECHO_DATA = 8, 50*06060028SVarun Wadekar MCE_CMD_READ_VERSIONS = 9, 51*06060028SVarun Wadekar MCE_CMD_ENUM_FEATURES = 10, 52*06060028SVarun Wadekar MCE_CMD_ROC_FLUSH_CACHE_TRBITS = 11, 53*06060028SVarun Wadekar MCE_CMD_ENUM_READ_MCA = 12, 54*06060028SVarun Wadekar MCE_CMD_ENUM_WRITE_MCA = 13, 55*06060028SVarun Wadekar MCE_CMD_ROC_FLUSH_CACHE = 14, 56*06060028SVarun Wadekar MCE_CMD_ROC_CLEAN_CACHE = 15, 57*06060028SVarun Wadekar MCE_CMD_ENABLE_LATIC = 16, 58*06060028SVarun Wadekar MCE_CMD_UNCORE_PERFMON_REQ = 17, 59*06060028SVarun Wadekar MCE_CMD_MISC_CCPLEX = 18, 60*06060028SVarun Wadekar MCE_CMD_IS_CCX_ALLOWED = 0xFE, 61*06060028SVarun Wadekar MCE_CMD_MAX = 0xFF, 62*06060028SVarun Wadekar } mce_cmd_t; 63*06060028SVarun Wadekar 64*06060028SVarun Wadekar #define MCE_CMD_MASK 0xFF 65*06060028SVarun Wadekar 66*06060028SVarun Wadekar /******************************************************************************* 67*06060028SVarun Wadekar * Timeout value used to powerdown a core 68*06060028SVarun Wadekar ******************************************************************************/ 69*06060028SVarun Wadekar #define MCE_CORE_SLEEP_TIME_INFINITE 0xFFFFFFFF 70*06060028SVarun Wadekar 71*06060028SVarun Wadekar /******************************************************************************* 72*06060028SVarun Wadekar * Struct to prepare UPDATE_CSTATE_INFO request 73*06060028SVarun Wadekar ******************************************************************************/ 74*06060028SVarun Wadekar typedef struct mce_cstate_info { 75*06060028SVarun Wadekar /* cluster cstate value */ 76*06060028SVarun Wadekar uint32_t cluster; 77*06060028SVarun Wadekar /* ccplex cstate value */ 78*06060028SVarun Wadekar uint32_t ccplex; 79*06060028SVarun Wadekar /* system cstate value */ 80*06060028SVarun Wadekar uint32_t system; 81*06060028SVarun Wadekar /* force system state? */ 82*06060028SVarun Wadekar uint8_t system_state_force; 83*06060028SVarun Wadekar /* wake mask value */ 84*06060028SVarun Wadekar uint32_t wake_mask; 85*06060028SVarun Wadekar /* update the wake mask? */ 86*06060028SVarun Wadekar uint8_t update_wake_mask; 87*06060028SVarun Wadekar } mce_cstate_info_t; 88*06060028SVarun Wadekar 89*06060028SVarun Wadekar /* public interfaces */ 90*06060028SVarun Wadekar int mce_command_handler(mce_cmd_t cmd, uint64_t arg0, uint64_t arg1, 91*06060028SVarun Wadekar uint64_t arg2); 92*06060028SVarun Wadekar int mce_update_reset_vector(void); 93*06060028SVarun Wadekar int mce_update_gsc_videomem(void); 94*06060028SVarun Wadekar int mce_update_gsc_tzdram(void); 95*06060028SVarun Wadekar int mce_update_gsc_tzram(void); 96*06060028SVarun Wadekar __dead2 void mce_enter_ccplex_state(uint32_t state_idx); 97*06060028SVarun Wadekar void mce_update_cstate_info(mce_cstate_info_t *cstate); 98*06060028SVarun Wadekar void mce_verify_firmware_version(void); 99*06060028SVarun Wadekar 100*06060028SVarun Wadekar #endif /* __MCE_H__ */ 101