1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BPMP_H 8 #define BPMP_H 9 10 #include <stdint.h> 11 12 /* macro to enable clock to the Atomics block */ 13 #define CAR_ENABLE_ATOMICS (1U << 16) 14 15 /* command to get the channel base addresses from bpmp */ 16 #define ATOMIC_CMD_GET 4U 17 18 /* Hardware IRQ # used to signal bpmp of an incoming command */ 19 #define INT_SHR_SEM_OUTBOX_FULL 6U 20 21 /* macros to decode the bpmp's state */ 22 #define CH_MASK(ch) ((uint32_t)0x3 << ((ch) * 2U)) 23 #define MA_FREE(ch) ((uint32_t)0x2 << ((ch) * 2U)) 24 #define MA_ACKD(ch) ((uint32_t)0x3 << ((ch) * 2U)) 25 26 /* response from bpmp to indicate it has powered up */ 27 #define SIGN_OF_LIFE 0xAAAAAAAAU 28 29 /* flags to indicate bpmp driver's state */ 30 #define BPMP_INIT_COMPLETE 0xBEEFF00DU 31 #define BPMP_INIT_PENDING 0xDEADBEEFU 32 #define BPMP_SUSPEND_ENTRY 0xF00DCAFEU 33 34 /* requests serviced by the bpmp */ 35 #define MRQ_PING 0 36 #define MRQ_QUERY_TAG 1 37 #define MRQ_DO_IDLE 2 38 #define MRQ_TOLERATE_IDLE 3 39 #define MRQ_MODULE_LOAD 4 40 #define MRQ_MODULE_UNLOAD 5 41 #define MRQ_SWITCH_CLUSTER 6 42 #define MRQ_TRACE_MODIFY 7 43 #define MRQ_WRITE_TRACE 8 44 #define MRQ_THREADED_PING 9 45 #define MRQ_CPUIDLE_USAGE 10 46 #define MRQ_MODULE_MAIL 11 47 #define MRQ_SCX_ENABLE 12 48 #define MRQ_BPMPIDLE_USAGE 14 49 #define MRQ_HEAP_USAGE 15 50 #define MRQ_SCLK_SKIP_SET_RATE 16 51 #define MRQ_ENABLE_SUSPEND 17 52 #define MRQ_PASR_MASK 18 53 #define MRQ_DEBUGFS 19 54 #define MRQ_THERMAL 27 55 56 /* Tegra PM states as known to BPMP */ 57 #define TEGRA_PM_CC1 9 58 #define TEGRA_PM_CC4 12 59 #define TEGRA_PM_CC6 14 60 #define TEGRA_PM_CC7 15 61 #define TEGRA_PM_SC1 17 62 #define TEGRA_PM_SC2 18 63 #define TEGRA_PM_SC3 19 64 #define TEGRA_PM_SC4 20 65 #define TEGRA_PM_SC7 23 66 67 /* flag to indicate if entry into a CCx power state is allowed */ 68 #define BPMP_CCx_ALLOWED 0U 69 70 /* number of communication channels to interact with the bpmp */ 71 #define NR_CHANNELS 4U 72 73 /* flag to ask bpmp to acknowledge command packet */ 74 #define NO_ACK (0U << 0U) 75 #define DO_ACK (1U << 0U) 76 77 /* size of the command/response data */ 78 #define MSG_DATA_MAX_SZ 120U 79 80 /** 81 * command/response packet to/from the bpmp 82 * 83 * command 84 * ------- 85 * code: MRQ_* command 86 * flags: DO_ACK or NO_ACK 87 * data: 88 * [0] = cpu # 89 * [1] = cluster power state (TEGRA_PM_CCx) 90 * [2] = system power state (TEGRA_PM_SCx) 91 * 92 * response 93 * --------- 94 * code: error code 95 * flags: not used 96 * data: 97 * [0-3] = response value 98 */ 99 typedef struct mb_data { 100 int32_t code; 101 uint32_t flags; 102 uint8_t data[MSG_DATA_MAX_SZ]; 103 } mb_data_t; 104 105 /** 106 * Function to initialise the interface with the bpmp 107 */ 108 int tegra_bpmp_init(void); 109 110 /** 111 * Function to suspend the interface with the bpmp 112 */ 113 void tegra_bpmp_suspend(void); 114 115 /** 116 * Function to resume the interface with the bpmp 117 */ 118 void tegra_bpmp_resume(void); 119 120 /** 121 * Handler to send a MRQ_* command to the bpmp 122 */ 123 int32_t tegra_bpmp_send_receive_atomic(int mrq, const void *ob_data, int ob_sz, 124 void *ib_data, int ib_sz); 125 126 #endif /* BPMP_H */ 127