1*e2469d82SVarun Wadekar /* 2*e2469d82SVarun Wadekar * Copyright (c) 2017-2020, NVIDIA Corporation. All rights reserved. 3*e2469d82SVarun Wadekar * 4*e2469d82SVarun Wadekar * SPDX-License-Identifier: BSD-3-Clause 5*e2469d82SVarun Wadekar */ 6*e2469d82SVarun Wadekar 7*e2469d82SVarun Wadekar #ifndef BPMP_IVC_H 8*e2469d82SVarun Wadekar #define BPMP_IVC_H 9*e2469d82SVarun Wadekar 10*e2469d82SVarun Wadekar #include <lib/utils_def.h> 11*e2469d82SVarun Wadekar #include <stdint.h> 12*e2469d82SVarun Wadekar #include <stddef.h> 13*e2469d82SVarun Wadekar 14*e2469d82SVarun Wadekar #define IVC_ALIGN U(64) 15*e2469d82SVarun Wadekar #define IVC_CHHDR_TX_FIELDS U(16) 16*e2469d82SVarun Wadekar #define IVC_CHHDR_RX_FIELDS U(16) 17*e2469d82SVarun Wadekar 18*e2469d82SVarun Wadekar struct ivc_channel_header; 19*e2469d82SVarun Wadekar 20*e2469d82SVarun Wadekar struct ivc { 21*e2469d82SVarun Wadekar struct ivc_channel_header *rx_channel; 22*e2469d82SVarun Wadekar struct ivc_channel_header *tx_channel; 23*e2469d82SVarun Wadekar uint32_t w_pos; 24*e2469d82SVarun Wadekar uint32_t r_pos; 25*e2469d82SVarun Wadekar void (*notify)(const struct ivc *); 26*e2469d82SVarun Wadekar uint32_t nframes; 27*e2469d82SVarun Wadekar uint32_t frame_size; 28*e2469d82SVarun Wadekar }; 29*e2469d82SVarun Wadekar 30*e2469d82SVarun Wadekar /* callback handler for notify on receiving a response */ 31*e2469d82SVarun Wadekar typedef void (* ivc_notify_function)(const struct ivc *); 32*e2469d82SVarun Wadekar 33*e2469d82SVarun Wadekar int32_t tegra_ivc_init(struct ivc *ivc, uintptr_t rx_base, uintptr_t tx_base, 34*e2469d82SVarun Wadekar uint32_t nframes, uint32_t frame_size, 35*e2469d82SVarun Wadekar ivc_notify_function notify); 36*e2469d82SVarun Wadekar size_t tegra_ivc_total_queue_size(size_t queue_size); 37*e2469d82SVarun Wadekar size_t tegra_ivc_align(size_t size); 38*e2469d82SVarun Wadekar int32_t tegra_ivc_channel_notified(struct ivc *ivc); 39*e2469d82SVarun Wadekar void tegra_ivc_channel_reset(const struct ivc *ivc); 40*e2469d82SVarun Wadekar int32_t tegra_ivc_write_advance(struct ivc *ivc); 41*e2469d82SVarun Wadekar void *tegra_ivc_write_get_next_frame(const struct ivc *ivc); 42*e2469d82SVarun Wadekar int32_t tegra_ivc_write(struct ivc *ivc, const void *buf, size_t size); 43*e2469d82SVarun Wadekar int32_t tegra_ivc_read_advance(struct ivc *ivc); 44*e2469d82SVarun Wadekar void *tegra_ivc_read_get_next_frame(const struct ivc *ivc); 45*e2469d82SVarun Wadekar int32_t tegra_ivc_read(struct ivc *ivc, void *buf, size_t max_read); 46*e2469d82SVarun Wadekar bool tegra_ivc_tx_empty(const struct ivc *ivc); 47*e2469d82SVarun Wadekar bool tegra_ivc_can_write(const struct ivc *ivc); 48*e2469d82SVarun Wadekar bool tegra_ivc_can_read(const struct ivc *ivc); 49*e2469d82SVarun Wadekar 50*e2469d82SVarun Wadekar #endif /* BPMP_IVC_H */ 51