1c8961326SVarun Wadekar /* 2c8961326SVarun Wadekar * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. 3c8961326SVarun Wadekar * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5c8961326SVarun Wadekar */ 6c8961326SVarun Wadekar 7c8961326SVarun Wadekar #include <delay_timer.h> 8c8961326SVarun Wadekar #include <mmio.h> 9c8961326SVarun Wadekar #include <tegra_def.h> 10c8961326SVarun Wadekar 11c8961326SVarun Wadekar static uint32_t tegra_timerus_get_value(void) 12c8961326SVarun Wadekar { 13c8961326SVarun Wadekar return mmio_read_32(TEGRA_TMRUS_BASE); 14c8961326SVarun Wadekar } 15c8961326SVarun Wadekar 16c8961326SVarun Wadekar static const timer_ops_t tegra_timer_ops = { 17c8961326SVarun Wadekar .get_timer_value = tegra_timerus_get_value, 18c8961326SVarun Wadekar .clk_mult = 1, 19c8961326SVarun Wadekar .clk_div = 1, 20c8961326SVarun Wadekar }; 21c8961326SVarun Wadekar 22c8961326SVarun Wadekar /* 23c8961326SVarun Wadekar * Initialise the on-chip free rolling us counter as the delay 24c8961326SVarun Wadekar * timer. 25c8961326SVarun Wadekar */ 26c8961326SVarun Wadekar void tegra_delay_timer_init(void) 27c8961326SVarun Wadekar { 28c8961326SVarun Wadekar timer_init(&tegra_timer_ops); 29c8961326SVarun Wadekar } 30