1c8961326SVarun Wadekar /* 2*3436089dSAnthony Zhou * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3c8961326SVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5c8961326SVarun Wadekar */ 6c8961326SVarun Wadekar 7c8961326SVarun Wadekar #include <delay_timer.h> 8c8961326SVarun Wadekar #include <mmio.h> 9c8961326SVarun Wadekar #include <tegra_def.h> 10*3436089dSAnthony Zhou #include <tegra_private.h> 11c8961326SVarun Wadekar 12c8961326SVarun Wadekar static uint32_t tegra_timerus_get_value(void) 13c8961326SVarun Wadekar { 14c8961326SVarun Wadekar return mmio_read_32(TEGRA_TMRUS_BASE); 15c8961326SVarun Wadekar } 16c8961326SVarun Wadekar 17c8961326SVarun Wadekar /* 18c8961326SVarun Wadekar * Initialise the on-chip free rolling us counter as the delay 19c8961326SVarun Wadekar * timer. 20c8961326SVarun Wadekar */ 21c8961326SVarun Wadekar void tegra_delay_timer_init(void) 22c8961326SVarun Wadekar { 23*3436089dSAnthony Zhou static const timer_ops_t tegra_timer_ops = { 24*3436089dSAnthony Zhou .get_timer_value = tegra_timerus_get_value, 25*3436089dSAnthony Zhou .clk_mult = 1, 26*3436089dSAnthony Zhou .clk_div = 1, 27*3436089dSAnthony Zhou }; 28*3436089dSAnthony Zhou 29c8961326SVarun Wadekar timer_init(&tegra_timer_ops); 30c8961326SVarun Wadekar } 31