1c8961326SVarun Wadekar /* 23436089dSAnthony Zhou * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3c8961326SVarun Wadekar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5c8961326SVarun Wadekar */ 6c8961326SVarun Wadekar 7*09d40e0eSAntonio Nino Diaz #include <drivers/delay_timer.h> 8*09d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 9*09d40e0eSAntonio Nino Diaz 10c8961326SVarun Wadekar #include <tegra_def.h> 113436089dSAnthony Zhou #include <tegra_private.h> 12c8961326SVarun Wadekar 13c8961326SVarun Wadekar static uint32_t tegra_timerus_get_value(void) 14c8961326SVarun Wadekar { 15c8961326SVarun Wadekar return mmio_read_32(TEGRA_TMRUS_BASE); 16c8961326SVarun Wadekar } 17c8961326SVarun Wadekar 18c8961326SVarun Wadekar /* 19c8961326SVarun Wadekar * Initialise the on-chip free rolling us counter as the delay 20c8961326SVarun Wadekar * timer. 21c8961326SVarun Wadekar */ 22c8961326SVarun Wadekar void tegra_delay_timer_init(void) 23c8961326SVarun Wadekar { 243436089dSAnthony Zhou static const timer_ops_t tegra_timer_ops = { 253436089dSAnthony Zhou .get_timer_value = tegra_timerus_get_value, 263436089dSAnthony Zhou .clk_mult = 1, 273436089dSAnthony Zhou .clk_div = 1, 283436089dSAnthony Zhou }; 293436089dSAnthony Zhou 30c8961326SVarun Wadekar timer_init(&tegra_timer_ops); 31c8961326SVarun Wadekar } 32