xref: /rk3399_ARM-atf/plat/nuvoton/npcm845x/platform.mk (revision c7efb78f8edc8fa66bbe2f9bad390d29f6a43fb0)
1edcece15Srutigl@gmail.com#
2edcece15Srutigl@gmail.com# Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
3edcece15Srutigl@gmail.com#
4edcece15Srutigl@gmail.com# Copyright (c) 2017-2023 Nuvoton Ltd.
5edcece15Srutigl@gmail.com#
6edcece15Srutigl@gmail.com# SPDX-License-Identifier: BSD-3-Clause
7edcece15Srutigl@gmail.com#
8edcece15Srutigl@gmail.com
9edcece15Srutigl@gmail.com# This is a debug flag for bring-up. It allows reducing CPU numbers
10edcece15Srutigl@gmail.com# SECONDARY_BRINGUP	:=	1
11edcece15Srutigl@gmail.comRESET_TO_BL31	:=	1
12*c7efb78fSMargarita GlushkinSPMD_SPM_AT_SEL2	:= 0
13edcece15Srutigl@gmail.com#temporary until the RAM size is reduced
14edcece15Srutigl@gmail.comUSE_COHERENT_MEM	:=	1
15edcece15Srutigl@gmail.com
16edcece15Srutigl@gmail.com
17edcece15Srutigl@gmail.com$(eval $(call add_define,RESET_TO_BL31))
18edcece15Srutigl@gmail.com
19edcece15Srutigl@gmail.comifeq (${ARCH}, aarch64)
20edcece15Srutigl@gmail.com# On ARM standard platorms, the TSP can execute from Trusted SRAM,
21edcece15Srutigl@gmail.com# Trusted DRAM (if available) or the TZC secured area of DRAM.
22edcece15Srutigl@gmail.com# TZC secured DRAM is the default.
23edcece15Srutigl@gmail.com
24edcece15Srutigl@gmail.com# Process ARM_BL31_IN_DRAM flag
25edcece15Srutigl@gmail.comARM_BL31_IN_DRAM	:=	0
26edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
27edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_BL31_IN_DRAM))
28edcece15Srutigl@gmail.comendif
29edcece15Srutigl@gmail.com
30edcece15Srutigl@gmail.com# For the original power-state parameter format, the State-ID can be encoded
31edcece15Srutigl@gmail.com# according to the recommended encoding or zero. This flag determines which
32edcece15Srutigl@gmail.com# State-ID encoding to be parsed.
33edcece15Srutigl@gmail.comARM_RECOM_STATE_ID_ENC	:=	0
34edcece15Srutigl@gmail.com
35edcece15Srutigl@gmail.com# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC
36edcece15Srutigl@gmail.com# need to be set. Else throw a build error.
37edcece15Srutigl@gmail.comifeq (${PSCI_EXTENDED_STATE_ID}, 1)
38edcece15Srutigl@gmail.comifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
39edcece15Srutigl@gmail.com$(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
40edcece15Srutigl@gmail.com	PSCI_EXTENDED_STATE_ID is set for ARM platforms)
41edcece15Srutigl@gmail.comendif
42edcece15Srutigl@gmail.comendif
43edcece15Srutigl@gmail.com
44edcece15Srutigl@gmail.com# Process ARM_RECOM_STATE_ID_ENC flag
45edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
46edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
47edcece15Srutigl@gmail.com
48edcece15Srutigl@gmail.com# Process ARM_DISABLE_TRUSTED_WDOG flag
49edcece15Srutigl@gmail.com# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
50edcece15Srutigl@gmail.comARM_DISABLE_TRUSTED_WDOG	:=	0
51edcece15Srutigl@gmail.comifeq (${SPIN_ON_BL1_EXIT}, 1)
52edcece15Srutigl@gmail.comARM_DISABLE_TRUSTED_WDOG	:=	1
53edcece15Srutigl@gmail.comendif
54edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
55edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
56edcece15Srutigl@gmail.com
57edcece15Srutigl@gmail.com# Process ARM_CONFIG_CNTACR
58edcece15Srutigl@gmail.comARM_CONFIG_CNTACR	:=	1
59edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
60edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_CONFIG_CNTACR))
61edcece15Srutigl@gmail.com
62edcece15Srutigl@gmail.com# Process ARM_BL31_IN_DRAM flag
63edcece15Srutigl@gmail.comARM_BL31_IN_DRAM	:=	0
64edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
65edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_BL31_IN_DRAM))
66edcece15Srutigl@gmail.com
67edcece15Srutigl@gmail.com# Process ARM_PLAT_MT flag
68edcece15Srutigl@gmail.comARM_PLAT_MT	:=	0
69edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_PLAT_MT))
70edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_PLAT_MT))
71edcece15Srutigl@gmail.com
72edcece15Srutigl@gmail.com# Use translation tables library v2 by default
73edcece15Srutigl@gmail.comARM_XLAT_TABLES_LIB_V1	:=	0
74edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
75edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
76edcece15Srutigl@gmail.com
77edcece15Srutigl@gmail.com# Don't have the Linux kernel as a BL33 image by default
78edcece15Srutigl@gmail.comARM_LINUX_KERNEL_AS_BL33	:=	0
79edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
80edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
81edcece15Srutigl@gmail.com
82edcece15Srutigl@gmail.comifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
83edcece15Srutigl@gmail.comifeq (${ARCH},aarch64)
84edcece15Srutigl@gmail.comifneq (${RESET_TO_BL31},1)
85edcece15Srutigl@gmail.com$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_BL31=1.")
86edcece15Srutigl@gmail.comendif
87edcece15Srutigl@gmail.comelse
88edcece15Srutigl@gmail.comifneq (${RESET_TO_SP_MIN},1)
89edcece15Srutigl@gmail.com$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
90edcece15Srutigl@gmail.comendif
91edcece15Srutigl@gmail.comendif
92edcece15Srutigl@gmail.com
93edcece15Srutigl@gmail.comifndef PRELOADED_BL33_BASE
94edcece15Srutigl@gmail.com$(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
95edcece15Srutigl@gmail.comendif
96edcece15Srutigl@gmail.com
97edcece15Srutigl@gmail.comifndef ARM_PRELOADED_DTB_BASE
98edcece15Srutigl@gmail.com$(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
99edcece15Srutigl@gmail.comendif
100edcece15Srutigl@gmail.com
101edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
102edcece15Srutigl@gmail.comendif
103edcece15Srutigl@gmail.com
104edcece15Srutigl@gmail.com# Use an implementation of SHA-256 with a smaller memory footprint
105edcece15Srutigl@gmail.com# but reduced speed.
106edcece15Srutigl@gmail.com$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
107edcece15Srutigl@gmail.com
108edcece15Srutigl@gmail.com# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
109edcece15Srutigl@gmail.com# in the FIP if the platform requires.
110edcece15Srutigl@gmail.comifneq ($(BL32_EXTRA1),)
111edcece15Srutigl@gmail.com$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
112edcece15Srutigl@gmail.comendif
113edcece15Srutigl@gmail.comifneq ($(BL32_EXTRA2),)
114edcece15Srutigl@gmail.com$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
115edcece15Srutigl@gmail.comendif
116edcece15Srutigl@gmail.com
117edcece15Srutigl@gmail.com# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
118edcece15Srutigl@gmail.comENABLE_PSCI_STAT	:=	1
119edcece15Srutigl@gmail.comENABLE_PMF		:=	1
120edcece15Srutigl@gmail.com
121edcece15Srutigl@gmail.com# On ARM platforms, separate the code and read-only data sections to allow
122edcece15Srutigl@gmail.com# mapping the former as executable and the latter as execute-never.
123edcece15Srutigl@gmail.comSEPARATE_CODE_AND_RODATA	:=	1
124edcece15Srutigl@gmail.com
125edcece15Srutigl@gmail.com# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
126edcece15Srutigl@gmail.com# and NOBITS sections of BL31 image are adjacent to each other and loaded
127edcece15Srutigl@gmail.com# into Trusted SRAM.
128edcece15Srutigl@gmail.comSEPARATE_NOBITS_REGION	:=	0
129edcece15Srutigl@gmail.com
130edcece15Srutigl@gmail.com# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
131edcece15Srutigl@gmail.com# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
132edcece15Srutigl@gmail.com# the build to require that ARM_BL31_IN_DRAM is enabled as well.
133edcece15Srutigl@gmail.comifeq ($(SEPARATE_NOBITS_REGION),1)
134edcece15Srutigl@gmail.comifneq ($(ARM_BL31_IN_DRAM),1)
135edcece15Srutigl@gmail.com$(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
136edcece15Srutigl@gmail.comendif
137edcece15Srutigl@gmail.com
138edcece15Srutigl@gmail.comifneq ($(RECLAIM_INIT_CODE),0)
139edcece15Srutigl@gmail.com$(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
140edcece15Srutigl@gmail.comendif
141edcece15Srutigl@gmail.comendif
142edcece15Srutigl@gmail.com
143edcece15Srutigl@gmail.com# Disable ARM Cryptocell by default
144edcece15Srutigl@gmail.comARM_CRYPTOCELL_INTEG	:=	0
145edcece15Srutigl@gmail.com$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
146edcece15Srutigl@gmail.com$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
147edcece15Srutigl@gmail.com
148edcece15Srutigl@gmail.com# Enable PIE support for RESET_TO_BL31 case
149edcece15Srutigl@gmail.comifeq (${RESET_TO_BL31},1)
150edcece15Srutigl@gmail.comENABLE_PIE	:=	1
151edcece15Srutigl@gmail.comendif
152edcece15Srutigl@gmail.com
153edcece15Srutigl@gmail.com# CryptoCell integration relies on coherent buffers for passing data from
154edcece15Srutigl@gmail.com# the AP CPU to the CryptoCell
155edcece15Srutigl@gmail.com
156edcece15Srutigl@gmail.comifeq (${ARM_CRYPTOCELL_INTEG},1)
157edcece15Srutigl@gmail.comifeq (${USE_COHERENT_MEM},0)
158edcece15Srutigl@gmail.com$(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
159edcece15Srutigl@gmail.comendif
160edcece15Srutigl@gmail.comendif
161edcece15Srutigl@gmail.com
162edcece15Srutigl@gmail.comPLAT_INCLUDES	:=	-Iinclude/plat/nuvoton/npcm845x \
163edcece15Srutigl@gmail.com		-Iinclude/plat/nuvoton/common \
164edcece15Srutigl@gmail.com		-Iinclude/drivers/nuvoton/npcm845x \
165edcece15Srutigl@gmail.com
166edcece15Srutigl@gmail.comifeq (${ARCH}, aarch64)
167edcece15Srutigl@gmail.comPLAT_INCLUDES	+=	-Iinclude/plat/arm/common/aarch64
168edcece15Srutigl@gmail.comendif
169edcece15Srutigl@gmail.com
170edcece15Srutigl@gmail.com# Include GICv3 driver files
171edcece15Srutigl@gmail.cominclude drivers/arm/gic/v2/gicv2.mk
172edcece15Srutigl@gmail.com
173edcece15Srutigl@gmail.comNPCM850_GIC_SOURCES	:=	${GICV2_SOURCES}
174edcece15Srutigl@gmail.com
175edcece15Srutigl@gmail.comBL31_SOURCES	+=lib/cpus/aarch64/cortex_a35.S \
176edcece15Srutigl@gmail.com		plat/common/plat_psci_common.c \
177edcece15Srutigl@gmail.com		drivers/ti/uart/aarch64/16550_console.S \
178edcece15Srutigl@gmail.com		plat/nuvoton/npcm845x/npcm845x_psci.c \
179edcece15Srutigl@gmail.com		plat/nuvoton/npcm845x/npcm845x_serial_port.c \
180edcece15Srutigl@gmail.com		plat/nuvoton/common/nuvoton_topology.c \
181edcece15Srutigl@gmail.com		plat/nuvoton/npcm845x/npcm845x_bl31_setup.c
182edcece15Srutigl@gmail.com
183edcece15Srutigl@gmail.comPLAT_BL_COMMON_SOURCES	:=	drivers/delay_timer/delay_timer.c \
184edcece15Srutigl@gmail.com		drivers/delay_timer/generic_delay_timer.c \
185edcece15Srutigl@gmail.com		plat/common/plat_gicv2.c \
186edcece15Srutigl@gmail.com		plat/arm/common/arm_gicv2.c \
187edcece15Srutigl@gmail.com		plat/nuvoton/common/plat_nuvoton_gic.c \
188edcece15Srutigl@gmail.com		${NPCM850_GIC_SOURCES} \
189edcece15Srutigl@gmail.com		plat/nuvoton/npcm845x/npcm845x_common.c \
190edcece15Srutigl@gmail.com		plat/nuvoton/common/nuvoton_helpers.S \
191edcece15Srutigl@gmail.com		lib/semihosting/semihosting.c \
192edcece15Srutigl@gmail.com		lib/semihosting/${ARCH}/semihosting_call.S \
193edcece15Srutigl@gmail.com		plat/arm/common/arm_common.c \
194edcece15Srutigl@gmail.com		plat/arm/common/arm_console.c
195edcece15Srutigl@gmail.com
196edcece15Srutigl@gmail.comifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
197edcece15Srutigl@gmail.comPLAT_BL_COMMON_SOURCES	+=	lib/xlat_tables/xlat_tables_common.c \
198edcece15Srutigl@gmail.com		lib/xlat_tables/${ARCH}/xlat_tables.c
199edcece15Srutigl@gmail.comelse
200edcece15Srutigl@gmail.cominclude lib/xlat_tables_v2/xlat_tables.mk
201edcece15Srutigl@gmail.com
202edcece15Srutigl@gmail.comPLAT_BL_COMMON_SOURCES	+=	${XLAT_TABLES_LIB_SRCS}
203edcece15Srutigl@gmail.comendif
204edcece15Srutigl@gmail.com
205edcece15Srutigl@gmail.comARM_IO_SOURCES	+=	plat/arm/common/arm_io_storage.c \
206edcece15Srutigl@gmail.com		plat/arm/common/fconf/arm_fconf_io.c
207edcece15Srutigl@gmail.com
208edcece15Srutigl@gmail.comifeq (${SPD},spmd)
209edcece15Srutigl@gmail.comifeq (${SPMD_SPM_AT_SEL2},1)
210edcece15Srutigl@gmail.comARM_IO_SOURCES	+=	plat/arm/common/fconf/arm_fconf_sp.c
211edcece15Srutigl@gmail.comendif
212edcece15Srutigl@gmail.comendif
213edcece15Srutigl@gmail.com
214edcece15Srutigl@gmail.comBL1_SOURCES	+=	drivers/io/io_fip.c \
215edcece15Srutigl@gmail.com		drivers/io/io_memmap.c \
216edcece15Srutigl@gmail.com		drivers/io/io_storage.c \
217edcece15Srutigl@gmail.com		plat/arm/common/arm_bl1_setup.c \
218edcece15Srutigl@gmail.com		plat/arm/common/arm_err.c \
219edcece15Srutigl@gmail.com		${ARM_IO_SOURCES}
220edcece15Srutigl@gmail.com
221edcece15Srutigl@gmail.comifdef EL3_PAYLOAD_BASE
222edcece15Srutigl@gmail.com# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs
223edcece15Srutigl@gmail.com# from their holding pen
224edcece15Srutigl@gmail.comBL1_SOURCES	+=	plat/arm/common/arm_pm.c
225edcece15Srutigl@gmail.comendif
226edcece15Srutigl@gmail.com
227edcece15Srutigl@gmail.comBL2_SOURCES	+=	drivers/delay_timer/delay_timer.c \
228edcece15Srutigl@gmail.com		drivers/delay_timer/generic_delay_timer.c \
229edcece15Srutigl@gmail.com		drivers/io/io_fip.c \
230edcece15Srutigl@gmail.com		drivers/io/io_memmap.c \
231edcece15Srutigl@gmail.com		drivers/io/io_storage.c \
232edcece15Srutigl@gmail.com		plat/arm/common/arm_bl2_setup.c \
233edcece15Srutigl@gmail.com		plat/arm/common/arm_err.c \
234edcece15Srutigl@gmail.com		${ARM_IO_SOURCES}
235edcece15Srutigl@gmail.com
236edcece15Srutigl@gmail.com# Firmware Configuration Framework sources
237edcece15Srutigl@gmail.cominclude lib/fconf/fconf.mk
238edcece15Srutigl@gmail.com
239edcece15Srutigl@gmail.com# Add `libfdt` and Arm common helpers required for Dynamic Config
240edcece15Srutigl@gmail.cominclude lib/libfdt/libfdt.mk
241edcece15Srutigl@gmail.com
242edcece15Srutigl@gmail.comDYN_CFG_SOURCES	+=	plat/arm/common/arm_dyn_cfg.c \
243edcece15Srutigl@gmail.com		plat/arm/common/arm_dyn_cfg_helpers.c \
244edcece15Srutigl@gmail.com		common/fdt_wrappers.c
245edcece15Srutigl@gmail.com
246edcece15Srutigl@gmail.comBL1_SOURCES	+=	${DYN_CFG_SOURCES}
247edcece15Srutigl@gmail.comBL2_SOURCES	+=	${DYN_CFG_SOURCES}
248edcece15Srutigl@gmail.com
249edcece15Srutigl@gmail.comifeq (${BL2_AT_EL3},1)
250edcece15Srutigl@gmail.comBL2_SOURCES	+=	plat/arm/common/arm_bl2_el3_setup.c
251edcece15Srutigl@gmail.comendif
252edcece15Srutigl@gmail.com
253edcece15Srutigl@gmail.com# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
254edcece15Srutigl@gmail.com# the AArch32 descriptors.
255edcece15Srutigl@gmail.comBL2_SOURCES	+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
256edcece15Srutigl@gmail.comBL2_SOURCES	+=	plat/arm/common/arm_image_load.c \
257edcece15Srutigl@gmail.com		common/desc_image_load.c
258edcece15Srutigl@gmail.com
259edcece15Srutigl@gmail.comifeq (${SPD},opteed)
260edcece15Srutigl@gmail.comBL2_SOURCES	+=	lib/optee/optee_utils.c
261edcece15Srutigl@gmail.comendif
262edcece15Srutigl@gmail.com
263edcece15Srutigl@gmail.comBL2U_SOURCES	+=	drivers/delay_timer/delay_timer.c \
264edcece15Srutigl@gmail.com		drivers/delay_timer/generic_delay_timer.c \
265edcece15Srutigl@gmail.com		plat/arm/common/arm_bl2u_setup.c
266edcece15Srutigl@gmail.com
267edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/arm/common/arm_bl31_setup.c \
268edcece15Srutigl@gmail.com		plat/nuvoton/common/nuvoton_pm.c \
269edcece15Srutigl@gmail.com		plat/nuvoton/common/nuvoton_topology.c \
270edcece15Srutigl@gmail.com		plat/common/plat_psci_common.c
271edcece15Srutigl@gmail.com
272edcece15Srutigl@gmail.comifeq (${ENABLE_PMF}, 1)
273edcece15Srutigl@gmail.comifeq (${ARCH}, aarch64)
274edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/arm/common/aarch64/execution_state_switch.c \
275edcece15Srutigl@gmail.com		plat/arm/common/arm_sip_svc.c \
276edcece15Srutigl@gmail.com		lib/pmf/pmf_smc.c
277edcece15Srutigl@gmail.comelse
278edcece15Srutigl@gmail.comBL32_SOURCES	+=	plat/arm/common/arm_sip_svc.c \
279edcece15Srutigl@gmail.com		lib/pmf/pmf_smc.c
280edcece15Srutigl@gmail.comendif
281edcece15Srutigl@gmail.comendif
282edcece15Srutigl@gmail.com
283edcece15Srutigl@gmail.comifeq (${EL3_EXCEPTION_HANDLING},1)
284edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/arm/common/aarch64/arm_ehf.c
285edcece15Srutigl@gmail.comendif
286edcece15Srutigl@gmail.com
287edcece15Srutigl@gmail.comifeq (${SDEI_SUPPORT},1)
288edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/arm/common/aarch64/arm_sdei.c
289edcece15Srutigl@gmail.comifeq (${SDEI_IN_FCONF},1)
290edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/arm/common/fconf/fconf_sdei_getter.c
291edcece15Srutigl@gmail.comendif
292edcece15Srutigl@gmail.comendif
293edcece15Srutigl@gmail.com
294edcece15Srutigl@gmail.com# RAS sources
295edcece15Srutigl@gmail.comifeq (${RAS_EXTENSION},1)
296edcece15Srutigl@gmail.comBL31_SOURCES	+=	lib/extensions/ras/std_err_record.c \
297edcece15Srutigl@gmail.com		lib/extensions/ras/ras_common.c
298edcece15Srutigl@gmail.comendif
299edcece15Srutigl@gmail.com
300edcece15Srutigl@gmail.com# Pointer Authentication sources
301edcece15Srutigl@gmail.comifeq (${ENABLE_PAUTH}, 1)
302edcece15Srutigl@gmail.comPLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c \
303edcece15Srutigl@gmail.com		lib/extensions/pauth/pauth_helpers.S
304edcece15Srutigl@gmail.comendif
305edcece15Srutigl@gmail.com
306edcece15Srutigl@gmail.comifeq (${SPD},spmd)
307edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/common/plat_spmd_manifest.c \
308edcece15Srutigl@gmail.com		common/fdt_wrappers.c \
309edcece15Srutigl@gmail.com		${LIBFDT_SRCS}
310edcece15Srutigl@gmail.comendif
311edcece15Srutigl@gmail.com
312edcece15Srutigl@gmail.comifneq (${TRUSTED_BOARD_BOOT},0)
313edcece15Srutigl@gmail.com# Include common TBB sources
314edcece15Srutigl@gmail.comAUTH_SOURCES	:=	drivers/auth/auth_mod.c \
315edcece15Srutigl@gmail.com		drivers/auth/crypto_mod.c \
316edcece15Srutigl@gmail.com		drivers/auth/img_parser_mod.c \
317edcece15Srutigl@gmail.com		lib/fconf/fconf_tbbr_getter.c
318edcece15Srutigl@gmail.com
319edcece15Srutigl@gmail.com# Include the selected chain of trust sources.
320edcece15Srutigl@gmail.comifeq (${COT},tbbr)
321edcece15Srutigl@gmail.comAUTH_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c
322edcece15Srutigl@gmail.comBL1_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_bl1.c
323edcece15Srutigl@gmail.comBL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_bl2.c
324edcece15Srutigl@gmail.comelse ifeq (${COT},dualroot)
325edcece15Srutigl@gmail.comAUTH_SOURCES	+=	drivers/auth/dualroot/cot.c
326edcece15Srutigl@gmail.comelse
327edcece15Srutigl@gmail.com$(error Unknown chain of trust ${COT})
328edcece15Srutigl@gmail.comendif
329edcece15Srutigl@gmail.com
330edcece15Srutigl@gmail.comBL1_SOURCES	+=	${AUTH_SOURCES} \
331edcece15Srutigl@gmail.com		bl1/tbbr/tbbr_img_desc.c \
332edcece15Srutigl@gmail.com		plat/arm/common/arm_bl1_fwu.c \
333edcece15Srutigl@gmail.com		plat/common/tbbr/plat_tbbr.c
334edcece15Srutigl@gmail.com
335edcece15Srutigl@gmail.comBL2_SOURCES	+=	${AUTH_SOURCES} \
336edcece15Srutigl@gmail.com		plat/common/tbbr/plat_tbbr.c
337edcece15Srutigl@gmail.com
338edcece15Srutigl@gmail.com$(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
339edcece15Srutigl@gmail.com
340edcece15Srutigl@gmail.com# We expect to locate the *.mk files under the directories specified below
341edcece15Srutigl@gmail.comifeq (${ARM_CRYPTOCELL_INTEG},0)
342edcece15Srutigl@gmail.comCRYPTO_LIB_MK	:=	drivers/auth/mbedtls/mbedtls_crypto.mk
343edcece15Srutigl@gmail.comelse
344edcece15Srutigl@gmail.comCRYPTO_LIB_MK	:=	drivers/auth/cryptocell/cryptocell_crypto.mk
345edcece15Srutigl@gmail.comendif
346edcece15Srutigl@gmail.com
347edcece15Srutigl@gmail.comIMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
348edcece15Srutigl@gmail.com
349edcece15Srutigl@gmail.com$(info Including ${CRYPTO_LIB_MK})
350edcece15Srutigl@gmail.cominclude ${CRYPTO_LIB_MK}
351edcece15Srutigl@gmail.com
352edcece15Srutigl@gmail.com$(info Including ${IMG_PARSER_LIB_MK})
353edcece15Srutigl@gmail.cominclude ${IMG_PARSER_LIB_MK}
354edcece15Srutigl@gmail.comendif
355edcece15Srutigl@gmail.com
356edcece15Srutigl@gmail.comifeq (${MEASURED_BOOT},1)
357edcece15Srutigl@gmail.comMEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk
358edcece15Srutigl@gmail.com$(info Including ${MEASURED_BOOT_MK})
359edcece15Srutigl@gmail.cominclude ${MEASURED_BOOT_MK}
360edcece15Srutigl@gmail.comendif
361edcece15Srutigl@gmail.com
362edcece15Srutigl@gmail.comifeq (${EL3_EXCEPTION_HANDLING},1)
363edcece15Srutigl@gmail.comBL31_SOURCES	+=	plat/arm/common/aarch64/arm_ehf.c
364edcece15Srutigl@gmail.comendif
365edcece15Srutigl@gmail.com
366edcece15Srutigl@gmail.comBL1_SOURCES	:=
367edcece15Srutigl@gmail.comBL2_SOURCES	:=
368edcece15Srutigl@gmail.comBL2U_SOURCES	:=
369edcece15Srutigl@gmail.com
370edcece15Srutigl@gmail.comDEBUG_CONSOLE	?=	0
371edcece15Srutigl@gmail.com$(eval $(call add_define,DEBUG_CONSOLE))
372