1a65fadfbSGavin Liu# 2a65fadfbSGavin Liu# Copyright (c) 2024, MediaTek Inc. All rights reserved. 3a65fadfbSGavin Liu# 4a65fadfbSGavin Liu# SPDX-License-Identifier: BSD-3-Clause 5a65fadfbSGavin Liu# 6a65fadfbSGavin Liu 7a65fadfbSGavin Liu# Separate text code and read only data 8a65fadfbSGavin LiuSEPARATE_CODE_AND_RODATA := 1 9a65fadfbSGavin Liu 10a65fadfbSGavin Liu# ARMv8.2 and above need enable HW assist coherence 11a65fadfbSGavin LiuHW_ASSISTED_COHERENCY := 1 12a65fadfbSGavin Liu 13a65fadfbSGavin Liu# No need coherency memory because of HW assistency 14a65fadfbSGavin LiuUSE_COHERENT_MEM := 0 15a65fadfbSGavin Liu 16a65fadfbSGavin Liu# GIC600 17a65fadfbSGavin LiuGICV3_SUPPORT_GIC600 := 1 18a65fadfbSGavin Liu 19a65fadfbSGavin Liu# 20a65fadfbSGavin Liu# MTK options 21a65fadfbSGavin Liu# 22a65fadfbSGavin LiuPLAT_EXTRA_RODATA_INCLUDES := 1 23a65fadfbSGavin LiuUSE_PMIC_WRAP_INIT_V2 := 1 24a65fadfbSGavin Liu 25a65fadfbSGavin Liu# Configs for A78 and A55 26a65fadfbSGavin LiuCTX_INCLUDE_AARCH32_REGS := 0 27a65fadfbSGavin Liu 28a65fadfbSGavin LiuCONFIG_ARCH_ARM_V9 := y 29*9059a375SKarl LiCONFIG_MTK_APUSYS_EMI_SUPPORT := n 30a65fadfbSGavin LiuCONFIG_MTK_MCUSYS := y 31a65fadfbSGavin LiuMCUSYS_VERSION := v1 32a65fadfbSGavin LiuCONFIG_MTK_PM_SUPPORT := y 33a65fadfbSGavin LiuCONFIG_MTK_PM_ARCH := 9_0 34a65fadfbSGavin LiuCONFIG_MTK_CPU_PM_SUPPORT := y 35a65fadfbSGavin LiuCONFIG_MTK_CPU_PM_ARCH := 5_4 36a65fadfbSGavin LiuCONFIG_MTK_SMP_EN := n 37a65fadfbSGavin LiuCONFIG_MTK_CPU_SUSPEND_EN := y 38a65fadfbSGavin LiuCONFIG_MTK_SPM_VERSION := mt8196 39a65fadfbSGavin LiuCONFIG_MTK_SUPPORT_SYSTEM_SUSPEND := y 40a65fadfbSGavin LiuCPU_PM_TINYSYS_SUPPORT := y 41a65fadfbSGavin LiuMTK_PUBEVENT_ENABLE := y 42a65fadfbSGavin Liu 43a65fadfbSGavin LiuENABLE_FEAT_AMU := 1 44a65fadfbSGavin LiuENABLE_FEAT_ECV := 1 45a65fadfbSGavin LiuENABLE_FEAT_FGT := 1 46a65fadfbSGavin LiuENABLE_FEAT_HCX := 1 47a65fadfbSGavin LiuENABLE_SVE_FOR_SWD := 1 48