1174a1cfeSYidi Lin# 2174a1cfeSYidi Lin# Copyright (c) 2021, MediaTek Inc. All rights reserved. 3174a1cfeSYidi Lin# 4174a1cfeSYidi Lin# SPDX-License-Identifier: BSD-3-Clause 5174a1cfeSYidi Lin# 6174a1cfeSYidi Lin 7174a1cfeSYidi LinMTK_PLAT := plat/mediatek 8174a1cfeSYidi LinMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9174a1cfeSYidi Lin 10174a1cfeSYidi LinPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11c63f1451Schristine.zhu -I${MTK_PLAT}/common/drivers/gic600/ \ 1291550777SYidi Lin -I${MTK_PLAT}/common/drivers/timer/ \ 13174a1cfeSYidi Lin -I${MTK_PLAT_SOC}/include/ 14174a1cfeSYidi Lin 15c63f1451Schristine.zhuGICV3_SUPPORT_GIC600 := 1 16174a1cfeSYidi Lininclude drivers/arm/gic/v3/gicv3.mk 17174a1cfeSYidi Lininclude lib/xlat_tables_v2/xlat_tables.mk 18174a1cfeSYidi Lin 19174a1cfeSYidi LinPLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 20174a1cfeSYidi Lin ${XLAT_TABLES_LIB_SRCS} \ 21174a1cfeSYidi Lin plat/common/aarch64/crash_console_helpers.S \ 22174a1cfeSYidi Lin plat/common/plat_psci_common.c 23174a1cfeSYidi Lin 24174a1cfeSYidi Lin 25174a1cfeSYidi LinBL31_SOURCES += common/desc_image_load.c \ 26*65f0dd13SYidi Lin drivers/delay_timer/delay_timer.c \ 27*65f0dd13SYidi Lin drivers/delay_timer/generic_delay_timer.c \ 28174a1cfeSYidi Lin drivers/ti/uart/aarch64/16550_console.S \ 29174a1cfeSYidi Lin lib/bl_aux_params/bl_aux_params.c \ 30174a1cfeSYidi Lin lib/cpus/aarch64/cortex_a55.S \ 31174a1cfeSYidi Lin lib/cpus/aarch64/cortex_a78.S \ 32174a1cfeSYidi Lin plat/common/plat_gicv3.c \ 33c63f1451Schristine.zhu ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \ 3491550777SYidi Lin ${MTK_PLAT}/common/drivers/timer/mt_timer.c \ 35e5490f95Sgtk_pangao ${MTK_PLAT}/common/mtk_cirq.c \ 36174a1cfeSYidi Lin ${MTK_PLAT}/common/mtk_plat_common.c \ 37174a1cfeSYidi Lin ${MTK_PLAT}/common/params_setup.c \ 38174a1cfeSYidi Lin ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 39174a1cfeSYidi Lin ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 40174a1cfeSYidi Lin ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 41174a1cfeSYidi Lin ${MTK_PLAT_SOC}/plat_pm.c \ 42174a1cfeSYidi Lin ${MTK_PLAT_SOC}/plat_topology.c 43174a1cfeSYidi Lin 44174a1cfeSYidi Lin# Configs for A78 and A55 45174a1cfeSYidi LinHW_ASSISTED_COHERENCY := 1 46174a1cfeSYidi LinUSE_COHERENT_MEM := 0 47174a1cfeSYidi LinCTX_INCLUDE_AARCH32_REGS := 0 48174a1cfeSYidi LinERRATA_A55_1530923 := 1 49174a1cfeSYidi Lin 50174a1cfeSYidi Lin# indicate the reset vector address can be programmed 51174a1cfeSYidi LinPROGRAMMABLE_RESET_ADDRESS := 1 52174a1cfeSYidi Lin 53174a1cfeSYidi LinCOLD_BOOT_SINGLE_CPU := 1 54174a1cfeSYidi Lin 55174a1cfeSYidi LinMACH_MT8195 := 1 56174a1cfeSYidi Lin$(eval $(call add_define,MACH_MT8195)) 57174a1cfeSYidi Lin 58174a1cfeSYidi Lininclude lib/coreboot/coreboot.mk 59