xref: /rk3399_ARM-atf/plat/mediatek/mt8195/plat_sip_calls.c (revision d562130ea9637b885135a5efe41cb98f2365754f)
1938fd425SYidi Lin /*
2938fd425SYidi Lin  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3938fd425SYidi Lin  *
4938fd425SYidi Lin  * SPDX-License-Identifier: BSD-3-Clause
5938fd425SYidi Lin  */
6938fd425SYidi Lin 
7938fd425SYidi Lin #include <common/debug.h>
8938fd425SYidi Lin #include <common/runtime_svc.h>
97eb42237SRex-BC Chen #include <mt_dp.h>
10*d562130eSDawei Chien #include <mt_spm.h>
11*d562130eSDawei Chien #include <mt_spm_vcorefs.h>
127eb42237SRex-BC Chen #include <mtk_sip_svc.h>
137eb42237SRex-BC Chen #include "plat_sip_calls.h"
14938fd425SYidi Lin 
15938fd425SYidi Lin uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
16938fd425SYidi Lin 				u_register_t x1,
17938fd425SYidi Lin 				u_register_t x2,
18938fd425SYidi Lin 				u_register_t x3,
19938fd425SYidi Lin 				u_register_t x4,
20938fd425SYidi Lin 				void *cookie,
21938fd425SYidi Lin 				void *handle,
22938fd425SYidi Lin 				u_register_t flags)
23938fd425SYidi Lin {
247eb42237SRex-BC Chen 	int32_t ret;
257eb42237SRex-BC Chen 	uint32_t ret_val;
267eb42237SRex-BC Chen 
27938fd425SYidi Lin 	switch (smc_fid) {
287eb42237SRex-BC Chen 	case MTK_SIP_DP_CONTROL_AARCH32:
297eb42237SRex-BC Chen 	case MTK_SIP_DP_CONTROL_AARCH64:
307eb42237SRex-BC Chen 		ret = dp_secure_handler(x1, x2, &ret_val);
317eb42237SRex-BC Chen 		SMC_RET2(handle, ret, ret_val);
327eb42237SRex-BC Chen 		break;
33*d562130eSDawei Chien 	case MTK_SIP_VCORE_CONTROL_ARCH32:
34*d562130eSDawei Chien 	case MTK_SIP_VCORE_CONTROL_ARCH64:
35*d562130eSDawei Chien 		ret = spm_vcorefs_v2_args(x1, x2, x3, &x4);
36*d562130eSDawei Chien 		SMC_RET2(handle, ret, x4);
37*d562130eSDawei Chien 		break;
38938fd425SYidi Lin 	default:
39938fd425SYidi Lin 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
40938fd425SYidi Lin 		break;
41938fd425SYidi Lin 	}
42938fd425SYidi Lin 
43938fd425SYidi Lin 	SMC_RET1(handle, SMC_UNK);
44938fd425SYidi Lin }
45