xref: /rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/mt_spm_suspend.h (revision 7fa35d068ff9eabbf252414fd778cc4de7a4b141)
1*859e346bSEdward-JW Yang /*
2*859e346bSEdward-JW Yang  * Copyright (c) 2021, MediaTek Inc. All rights reserved.
3*859e346bSEdward-JW Yang  *
4*859e346bSEdward-JW Yang  * SPDX-License-Identifier: BSD-3-Clause
5*859e346bSEdward-JW Yang  */
6*859e346bSEdward-JW Yang 
7*859e346bSEdward-JW Yang #ifndef MT_SPM_SUSPEND_H
8*859e346bSEdward-JW Yang #define MT_SPM_SUSPEND_H
9*859e346bSEdward-JW Yang 
10*859e346bSEdward-JW Yang #include <mt_spm_internal.h>
11*859e346bSEdward-JW Yang 
12*859e346bSEdward-JW Yang #define MCUPM_MBOX_OFFSET_PDN	0x1031FF88
13*859e346bSEdward-JW Yang #define MCUPM_POWER_DOWN	0x4D50444E
14*859e346bSEdward-JW Yang 
15*859e346bSEdward-JW Yang enum MT_SPM_SUSPEND_MODE {
16*859e346bSEdward-JW Yang 	MT_SPM_SUSPEND_SYSTEM_PDN,
17*859e346bSEdward-JW Yang 	MT_SPM_SUSPEND_SLEEP,
18*859e346bSEdward-JW Yang };
19*859e346bSEdward-JW Yang 
20*859e346bSEdward-JW Yang extern int mt_spm_suspend_mode_set(int mode);
21*859e346bSEdward-JW Yang extern int mt_spm_suspend_enter(int state_id, unsigned int ext_opand,
22*859e346bSEdward-JW Yang 				unsigned int reosuce_req);
23*859e346bSEdward-JW Yang extern void mt_spm_suspend_resume(int state_id, unsigned int ext_opand,
24*859e346bSEdward-JW Yang 				  struct wake_status **status);
25*859e346bSEdward-JW Yang extern void mt_spm_suspend_init(void);
26*859e346bSEdward-JW Yang #endif /* MT_SPM_SUSPEND_H */
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