xref: /rk3399_ARM-atf/plat/mediatek/mt8195/bl31_plat_setup.c (revision f1b6b014d79b7522b0494c1595f7cd5900964681)
1 /*
2  * Copyright (c) 2021, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /* System Includes */
8 #include <assert.h>
9 
10 /* Project Includes */
11 #include <common/bl_common.h>
12 #include <common/debug.h>
13 #include <common/desc_image_load.h>
14 #include <drivers/generic_delay_timer.h>
15 #include <drivers/ti/uart/uart_16550.h>
16 #include <lib/coreboot.h>
17 
18 /* Platform Includes */
19 #include <mt_gic_v3.h>
20 #include <mt_timer.h>
21 #include <mtgpio.h>
22 #include <plat_params.h>
23 #include <plat_private.h>
24 
25 static entry_point_info_t bl32_ep_info;
26 static entry_point_info_t bl33_ep_info;
27 
28 /*******************************************************************************
29  * Return a pointer to the 'entry_point_info' structure of the next image for
30  * the security state specified. BL33 corresponds to the non-secure image type
31  * while BL32 corresponds to the secure image type. A NULL pointer is returned
32  * if the image does not exist.
33  ******************************************************************************/
34 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
35 {
36 	entry_point_info_t *next_image_info;
37 
38 	next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
39 	assert(next_image_info->h.type == PARAM_EP);
40 
41 	/* None of the images on this platform can have 0x0 as the entrypoint */
42 	if (next_image_info->pc) {
43 		return next_image_info;
44 	} else {
45 		return NULL;
46 	}
47 }
48 
49 /*******************************************************************************
50  * Perform any BL31 early platform setup. Here is an opportunity to copy
51  * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
52  * are lost (potentially). This needs to be done before the MMU is initialized
53  * so that the memory layout can be used while creating page tables.
54  * BL2 has flushed this information to memory, so we are guaranteed to pick up
55  * good data.
56  ******************************************************************************/
57 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
58 				u_register_t arg2, u_register_t arg3)
59 {
60 	static console_t console;
61 
62 	params_early_setup(arg1);
63 
64 #if COREBOOT
65 	if (coreboot_serial.type) {
66 		console_16550_register(coreboot_serial.baseaddr,
67 				       coreboot_serial.input_hertz,
68 				       coreboot_serial.baud,
69 				       &console);
70 	}
71 #else
72 	console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console);
73 #endif
74 
75 	NOTICE("MT8195 bl31_setup\n");
76 
77 	bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
78 }
79 
80 
81 /*******************************************************************************
82  * Perform any BL31 platform setup code
83  ******************************************************************************/
84 void bl31_platform_setup(void)
85 {
86 	/* Initialize the GIC driver, CPU and distributor interfaces */
87 	mt_gic_driver_init();
88 	mt_gic_init();
89 
90 	mt_gpio_init();
91 	mt_systimer_init();
92 	generic_delay_timer_init();
93 }
94 
95 /*******************************************************************************
96  * Perform the very early platform specific architectural setup here. At the
97  * moment this is only intializes the mmu in a quick and dirty way.
98  ******************************************************************************/
99 void bl31_plat_arch_setup(void)
100 {
101 	plat_configure_mmu_el3(BL31_START,
102 			       BL31_END - BL31_START,
103 			       BL_CODE_BASE,
104 			       BL_CODE_END);
105 }
106