1174a1cfeSYidi Lin /* 2174a1cfeSYidi Lin * Copyright (c) 2021, MediaTek Inc. All rights reserved. 3174a1cfeSYidi Lin * 4174a1cfeSYidi Lin * SPDX-License-Identifier: BSD-3-Clause 5174a1cfeSYidi Lin */ 6174a1cfeSYidi Lin 7174a1cfeSYidi Lin /* System Includes */ 8174a1cfeSYidi Lin #include <assert.h> 9174a1cfeSYidi Lin 10174a1cfeSYidi Lin /* Project Includes */ 11174a1cfeSYidi Lin #include <common/bl_common.h> 12174a1cfeSYidi Lin #include <common/debug.h> 13174a1cfeSYidi Lin #include <common/desc_image_load.h> 1465f0dd13SYidi Lin #include <drivers/generic_delay_timer.h> 15174a1cfeSYidi Lin #include <drivers/ti/uart/uart_16550.h> 16174a1cfeSYidi Lin #include <lib/coreboot.h> 17174a1cfeSYidi Lin 18174a1cfeSYidi Lin /* Platform Includes */ 19c63f1451Schristine.zhu #include <mt_gic_v3.h> 20*859e346bSEdward-JW Yang #include <mt_spm.h> 2191550777SYidi Lin #include <mt_timer.h> 22aebd4dc8Smtk20895 #include <mtgpio.h> 23174a1cfeSYidi Lin #include <plat_params.h> 24174a1cfeSYidi Lin #include <plat_private.h> 25174a1cfeSYidi Lin 26174a1cfeSYidi Lin static entry_point_info_t bl32_ep_info; 27174a1cfeSYidi Lin static entry_point_info_t bl33_ep_info; 28174a1cfeSYidi Lin 29174a1cfeSYidi Lin /******************************************************************************* 30174a1cfeSYidi Lin * Return a pointer to the 'entry_point_info' structure of the next image for 31174a1cfeSYidi Lin * the security state specified. BL33 corresponds to the non-secure image type 32174a1cfeSYidi Lin * while BL32 corresponds to the secure image type. A NULL pointer is returned 33174a1cfeSYidi Lin * if the image does not exist. 34174a1cfeSYidi Lin ******************************************************************************/ 35174a1cfeSYidi Lin entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 36174a1cfeSYidi Lin { 37174a1cfeSYidi Lin entry_point_info_t *next_image_info; 38174a1cfeSYidi Lin 39174a1cfeSYidi Lin next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 40174a1cfeSYidi Lin assert(next_image_info->h.type == PARAM_EP); 41174a1cfeSYidi Lin 42174a1cfeSYidi Lin /* None of the images on this platform can have 0x0 as the entrypoint */ 43174a1cfeSYidi Lin if (next_image_info->pc) { 44174a1cfeSYidi Lin return next_image_info; 45174a1cfeSYidi Lin } else { 46174a1cfeSYidi Lin return NULL; 47174a1cfeSYidi Lin } 48174a1cfeSYidi Lin } 49174a1cfeSYidi Lin 50174a1cfeSYidi Lin /******************************************************************************* 51174a1cfeSYidi Lin * Perform any BL31 early platform setup. Here is an opportunity to copy 52174a1cfeSYidi Lin * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they 53174a1cfeSYidi Lin * are lost (potentially). This needs to be done before the MMU is initialized 54174a1cfeSYidi Lin * so that the memory layout can be used while creating page tables. 55174a1cfeSYidi Lin * BL2 has flushed this information to memory, so we are guaranteed to pick up 56174a1cfeSYidi Lin * good data. 57174a1cfeSYidi Lin ******************************************************************************/ 58174a1cfeSYidi Lin void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 59174a1cfeSYidi Lin u_register_t arg2, u_register_t arg3) 60174a1cfeSYidi Lin { 61174a1cfeSYidi Lin static console_t console; 62174a1cfeSYidi Lin 63174a1cfeSYidi Lin params_early_setup(arg1); 64174a1cfeSYidi Lin 65174a1cfeSYidi Lin #if COREBOOT 66174a1cfeSYidi Lin if (coreboot_serial.type) { 67174a1cfeSYidi Lin console_16550_register(coreboot_serial.baseaddr, 68174a1cfeSYidi Lin coreboot_serial.input_hertz, 69174a1cfeSYidi Lin coreboot_serial.baud, 70174a1cfeSYidi Lin &console); 71174a1cfeSYidi Lin } 72174a1cfeSYidi Lin #else 73174a1cfeSYidi Lin console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); 74174a1cfeSYidi Lin #endif 75174a1cfeSYidi Lin 76174a1cfeSYidi Lin NOTICE("MT8195 bl31_setup\n"); 77174a1cfeSYidi Lin 78174a1cfeSYidi Lin bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); 79174a1cfeSYidi Lin } 80174a1cfeSYidi Lin 81174a1cfeSYidi Lin 82174a1cfeSYidi Lin /******************************************************************************* 83174a1cfeSYidi Lin * Perform any BL31 platform setup code 84174a1cfeSYidi Lin ******************************************************************************/ 85174a1cfeSYidi Lin void bl31_platform_setup(void) 86174a1cfeSYidi Lin { 87c63f1451Schristine.zhu /* Initialize the GIC driver, CPU and distributor interfaces */ 88c63f1451Schristine.zhu mt_gic_driver_init(); 89c63f1451Schristine.zhu mt_gic_init(); 9091550777SYidi Lin 91aebd4dc8Smtk20895 mt_gpio_init(); 9291550777SYidi Lin mt_systimer_init(); 9365f0dd13SYidi Lin generic_delay_timer_init(); 94*859e346bSEdward-JW Yang spm_boot_init(); 95174a1cfeSYidi Lin } 96174a1cfeSYidi Lin 97174a1cfeSYidi Lin /******************************************************************************* 98174a1cfeSYidi Lin * Perform the very early platform specific architectural setup here. At the 99174a1cfeSYidi Lin * moment this is only intializes the mmu in a quick and dirty way. 100174a1cfeSYidi Lin ******************************************************************************/ 101174a1cfeSYidi Lin void bl31_plat_arch_setup(void) 102174a1cfeSYidi Lin { 103174a1cfeSYidi Lin plat_configure_mmu_el3(BL31_START, 104174a1cfeSYidi Lin BL31_END - BL31_START, 105174a1cfeSYidi Lin BL_CODE_BASE, 106174a1cfeSYidi Lin BL_CODE_END); 107174a1cfeSYidi Lin } 108