1# 2# Copyright (c) 2020, MediaTek Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7MTK_PLAT := plat/mediatek 8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9 10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11 -I${MTK_PLAT_SOC}/include/ \ 12 -I${MTK_PLAT_SOC}/drivers/ \ 13 -I${MTK_PLAT_SOC}/drivers/gpio/ \ 14 -I${MTK_PLAT_SOC}/drivers/timer/ 15 16GICV3_SUPPORT_GIC600 := 1 17include drivers/arm/gic/v3/gicv3.mk 18include lib/xlat_tables_v2/xlat_tables.mk 19 20PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 21 ${XLAT_TABLES_LIB_SRCS} \ 22 plat/common/aarch64/crash_console_helpers.S \ 23 plat/common/plat_psci_common.c 24 25BL31_SOURCES += common/desc_image_load.c \ 26 drivers/ti/uart/aarch64/16550_console.S \ 27 drivers/gpio/gpio.c \ 28 lib/bl_aux_params/bl_aux_params.c \ 29 lib/cpus/aarch64/cortex_a55.S \ 30 lib/cpus/aarch64/cortex_a76.S \ 31 plat/common/plat_gicv3.c \ 32 ${MTK_PLAT}/common/mtk_plat_common.c \ 33 ${MTK_PLAT}/common/params_setup.c \ 34 ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 35 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 36 ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 37 ${MTK_PLAT_SOC}/plat_pm.c \ 38 ${MTK_PLAT_SOC}/plat_topology.c \ 39 ${MTK_PLAT_SOC}/plat_mt_gic.c \ 40 ${MTK_PLAT_SOC}/plat_mt_cirq.c \ 41 ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 42 ${MTK_PLAT_SOC}/drivers/timer/mt_timer.c 43 44 45# Configs for A76 and A55 46HW_ASSISTED_COHERENCY := 1 47USE_COHERENT_MEM := 0 48CTX_INCLUDE_AARCH32_REGS := 0 49 50# indicate the reset vector address can be programmed 51PROGRAMMABLE_RESET_ADDRESS := 1 52 53COLD_BOOT_SINGLE_CPU := 1 54 55MACH_MT8192 := 1 56$(eval $(call add_define,MACH_MT8192)) 57 58include lib/coreboot/coreboot.mk 59 60