1*f85f37d4SNina Wu# 2*f85f37d4SNina Wu# Copyright (c) 2020, MediaTek Inc. All rights reserved. 3*f85f37d4SNina Wu# 4*f85f37d4SNina Wu# SPDX-License-Identifier: BSD-3-Clause 5*f85f37d4SNina Wu# 6*f85f37d4SNina Wu 7*f85f37d4SNina WuMTK_PLAT := plat/mediatek 8*f85f37d4SNina WuMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9*f85f37d4SNina Wu 10*f85f37d4SNina WuPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11*f85f37d4SNina Wu -I${MTK_PLAT_SOC}/include/ 12*f85f37d4SNina Wu 13*f85f37d4SNina Wuinclude drivers/arm/gic/v3/gicv3.mk 14*f85f37d4SNina Wuinclude lib/xlat_tables_v2/xlat_tables.mk 15*f85f37d4SNina Wu 16*f85f37d4SNina WuPLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 17*f85f37d4SNina Wu ${XLAT_TABLES_LIB_SRCS} \ 18*f85f37d4SNina Wu plat/common/aarch64/crash_console_helpers.S \ 19*f85f37d4SNina Wu plat/common/plat_psci_common.c 20*f85f37d4SNina Wu 21*f85f37d4SNina WuBL31_SOURCES += common/desc_image_load.c \ 22*f85f37d4SNina Wu drivers/ti/uart/aarch64/16550_console.S \ 23*f85f37d4SNina Wu lib/bl_aux_params/bl_aux_params.c \ 24*f85f37d4SNina Wu lib/cpus/aarch64/cortex_a55.S \ 25*f85f37d4SNina Wu lib/cpus/aarch64/cortex_a76.S \ 26*f85f37d4SNina Wu plat/common/plat_gicv3.c \ 27*f85f37d4SNina Wu ${MTK_PLAT}/common/mtk_plat_common.c \ 28*f85f37d4SNina Wu ${MTK_PLAT}/common/params_setup.c \ 29*f85f37d4SNina Wu ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 30*f85f37d4SNina Wu ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 31*f85f37d4SNina Wu ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 32*f85f37d4SNina Wu ${MTK_PLAT_SOC}/plat_pm.c \ 33*f85f37d4SNina Wu ${MTK_PLAT_SOC}/plat_topology.c 34*f85f37d4SNina Wu 35*f85f37d4SNina Wu 36*f85f37d4SNina Wu# Configs for A76 and A55 37*f85f37d4SNina WuHW_ASSISTED_COHERENCY := 1 38*f85f37d4SNina WuUSE_COHERENT_MEM := 0 39*f85f37d4SNina WuCTX_INCLUDE_AARCH32_REGS := 0 40*f85f37d4SNina Wu 41*f85f37d4SNina Wu# indicate the reset vector address can be programmed 42*f85f37d4SNina WuPROGRAMMABLE_RESET_ADDRESS := 1 43*f85f37d4SNina Wu 44*f85f37d4SNina WuCOLD_BOOT_SINGLE_CPU := 1 45*f85f37d4SNina Wu 46*f85f37d4SNina WuMACH_MT8192 := 1 47*f85f37d4SNina Wu$(eval $(call add_define,MACH_MT8192)) 48*f85f37d4SNina Wu 49*f85f37d4SNina Wuinclude lib/coreboot/coreboot.mk 50*f85f37d4SNina Wu 51