1f85f37d4SNina Wu# 22f3f5939SLeon Chen# Copyright (c) 2020-2022, MediaTek Inc. All rights reserved. 3f85f37d4SNina Wu# 4f85f37d4SNina Wu# SPDX-License-Identifier: BSD-3-Clause 5f85f37d4SNina Wu# 6f85f37d4SNina Wu 7f85f37d4SNina WuMTK_PLAT := plat/mediatek 8f85f37d4SNina WuMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9f85f37d4SNina Wu 10f85f37d4SNina WuPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11*cd7890d7SBo-Chen Chen -I${MTK_PLAT}/common/lpm/ \ 12cc76896dSRex-BC Chen -I${MTK_PLAT}/drivers/cirq/ \ 133374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/gic600/ \ 143374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/gpio/ \ 1580fa7584SBo-Chen Chen -I${MTK_PLAT}/drivers/pmic/ \ 16ca93b018SBo-Chen Chen -I${MTK_PLAT}/drivers/pmic_wrap/ \ 173374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/rtc/ \ 183374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/timer/ \ 193374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/uart/ \ 202f3f5939SLeon Chen -I${MTK_PLAT}/include/ \ 21054af8f2SPo Xu -I${MTK_PLAT_SOC}/include/ \ 22054af8f2SPo Xu -I${MTK_PLAT_SOC}/drivers/ \ 23ca4c0c2eSFlora Fu -I${MTK_PLAT_SOC}/drivers/apusys/ \ 2443d7bbccSNina Wu -I${MTK_PLAT_SOC}/drivers/dcm \ 256b822d49SNina Wu -I${MTK_PLAT_SOC}/drivers/devapc \ 265183e637SRex-BC Chen -I${MTK_PLAT_SOC}/drivers/dfd \ 2742f2fa82SXi Chen -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \ 284a128018SDehui Sun -I${MTK_PLAT_SOC}/drivers/gpio/ \ 29271d9497SJames Liao -I${MTK_PLAT_SOC}/drivers/mcdi/ \ 30cbd6331bSHsin-Hsiung Wang -I${MTK_PLAT_SOC}/drivers/pmic/ \ 318709c939Selly.chiang -I${MTK_PLAT_SOC}/drivers/ptp3/ \ 3246946036SYidi Lin -I${MTK_PLAT_SOC}/drivers/spmc/ 33f85f37d4SNina Wu 3474f72b13SGreta ZhangGICV3_SUPPORT_GIC600 := 1 35f85f37d4SNina Wuinclude drivers/arm/gic/v3/gicv3.mk 36f85f37d4SNina Wuinclude lib/xlat_tables_v2/xlat_tables.mk 37f85f37d4SNina Wu 38f85f37d4SNina WuPLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 39f85f37d4SNina Wu ${XLAT_TABLES_LIB_SRCS} \ 40f85f37d4SNina Wu plat/common/aarch64/crash_console_helpers.S \ 41f85f37d4SNina Wu plat/common/plat_psci_common.c 42f85f37d4SNina Wu 43f85f37d4SNina WuBL31_SOURCES += common/desc_image_load.c \ 4495cc8894SNina Wu drivers/delay_timer/delay_timer.c \ 4595cc8894SNina Wu drivers/delay_timer/generic_delay_timer.c \ 46f85f37d4SNina Wu drivers/ti/uart/aarch64/16550_console.S \ 47054af8f2SPo Xu drivers/gpio/gpio.c \ 48f85f37d4SNina Wu lib/bl_aux_params/bl_aux_params.c \ 49f85f37d4SNina Wu lib/cpus/aarch64/cortex_a55.S \ 50f85f37d4SNina Wu lib/cpus/aarch64/cortex_a76.S \ 51f85f37d4SNina Wu plat/common/plat_gicv3.c \ 52f85f37d4SNina Wu ${MTK_PLAT}/common/mtk_plat_common.c \ 53189f038fSNina Wu ${MTK_PLAT}/common/mtk_sip_svc.c \ 54f85f37d4SNina Wu ${MTK_PLAT}/common/params_setup.c \ 55*cd7890d7SBo-Chen Chen ${MTK_PLAT}/common/lpm/mt_lp_rm.c \ 56cc76896dSRex-BC Chen ${MTK_PLAT}/drivers/cirq/mt_cirq.c \ 573374752fSBo-Chen Chen ${MTK_PLAT}/drivers/gic600/mt_gic_v3.c \ 583374752fSBo-Chen Chen ${MTK_PLAT}/drivers/gpio/mtgpio_common.c \ 5980fa7584SBo-Chen Chen ${MTK_PLAT}/drivers/pmic/pmic.c \ 603374752fSBo-Chen Chen ${MTK_PLAT}/drivers/pmic_wrap/pmic_wrap_init_v2.c \ 613374752fSBo-Chen Chen ${MTK_PLAT}/drivers/rtc/rtc_common.c \ 623374752fSBo-Chen Chen ${MTK_PLAT}/drivers/rtc/rtc_mt6359p.c \ 633374752fSBo-Chen Chen ${MTK_PLAT}/drivers/timer/mt_timer.c \ 643374752fSBo-Chen Chen ${MTK_PLAT}/drivers/uart/uart.c \ 65f85f37d4SNina Wu ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 66f85f37d4SNina Wu ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 67f85f37d4SNina Wu ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 68f85f37d4SNina Wu ${MTK_PLAT_SOC}/plat_pm.c \ 6974f72b13SGreta Zhang ${MTK_PLAT_SOC}/plat_topology.c \ 70189f038fSNina Wu ${MTK_PLAT_SOC}/plat_sip_calls.c \ 71ca4c0c2eSFlora Fu ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys.c \ 72f46e1f18SFlora Fu ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys_apc.c \ 7343d7bbccSNina Wu ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \ 7443d7bbccSNina Wu ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \ 756b822d49SNina Wu ${MTK_PLAT_SOC}/drivers/devapc/devapc.c \ 765183e637SRex-BC Chen ${MTK_PLAT_SOC}/drivers/dfd/plat_dfd.c \ 7742f2fa82SXi Chen ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \ 784a128018SDehui Sun ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 79271d9497SJames Liao ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \ 80271d9497SJames Liao ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \ 81df60025fSRoger Lu ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c \ 82271d9497SJames Liao ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \ 838709c939Selly.chiang ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c \ 8446946036SYidi Lin ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c 85f85f37d4SNina Wu 86ebb44440SRoger Lu# Build SPM drivers 87ebb44440SRoger Luinclude ${MTK_PLAT_SOC}/drivers/spm/build.mk 88ebb44440SRoger Lu 89f85f37d4SNina Wu# Configs for A76 and A55 90f85f37d4SNina WuHW_ASSISTED_COHERENCY := 1 91f85f37d4SNina WuUSE_COHERENT_MEM := 0 92f85f37d4SNina WuCTX_INCLUDE_AARCH32_REGS := 0 93f85f37d4SNina Wu 94f85f37d4SNina Wu# indicate the reset vector address can be programmed 95f85f37d4SNina WuPROGRAMMABLE_RESET_ADDRESS := 1 96f85f37d4SNina Wu 97f85f37d4SNina WuCOLD_BOOT_SINGLE_CPU := 1 98f85f37d4SNina Wu 99f85f37d4SNina WuMACH_MT8192 := 1 100f85f37d4SNina Wu$(eval $(call add_define,MACH_MT8192)) 101f85f37d4SNina Wu 102f85f37d4SNina Wuinclude lib/coreboot/coreboot.mk 103f85f37d4SNina Wu 104