1f85f37d4SNina Wu# 22f3f5939SLeon Chen# Copyright (c) 2020-2022, MediaTek Inc. All rights reserved. 3f85f37d4SNina Wu# 4f85f37d4SNina Wu# SPDX-License-Identifier: BSD-3-Clause 5f85f37d4SNina Wu# 6f85f37d4SNina Wu 7f85f37d4SNina WuMTK_PLAT := plat/mediatek 8f85f37d4SNina WuMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9f85f37d4SNina Wu 10f85f37d4SNina WuPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11*cc76896dSRex-BC Chen -I${MTK_PLAT}/drivers/cirq/ \ 123374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/gic600/ \ 133374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/gpio/ \ 143374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/lpm/ \ 153374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/rtc/ \ 163374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/timer/ \ 173374752fSBo-Chen Chen -I${MTK_PLAT}/drivers/uart/ \ 182f3f5939SLeon Chen -I${MTK_PLAT}/include/ \ 19054af8f2SPo Xu -I${MTK_PLAT_SOC}/include/ \ 20054af8f2SPo Xu -I${MTK_PLAT_SOC}/drivers/ \ 21ca4c0c2eSFlora Fu -I${MTK_PLAT_SOC}/drivers/apusys/ \ 2243d7bbccSNina Wu -I${MTK_PLAT_SOC}/drivers/dcm \ 236b822d49SNina Wu -I${MTK_PLAT_SOC}/drivers/devapc \ 245183e637SRex-BC Chen -I${MTK_PLAT_SOC}/drivers/dfd \ 2542f2fa82SXi Chen -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \ 264a128018SDehui Sun -I${MTK_PLAT_SOC}/drivers/gpio/ \ 27271d9497SJames Liao -I${MTK_PLAT_SOC}/drivers/mcdi/ \ 28cbd6331bSHsin-Hsiung Wang -I${MTK_PLAT_SOC}/drivers/pmic/ \ 298709c939Selly.chiang -I${MTK_PLAT_SOC}/drivers/ptp3/ \ 3046946036SYidi Lin -I${MTK_PLAT_SOC}/drivers/spmc/ 31f85f37d4SNina Wu 3274f72b13SGreta ZhangGICV3_SUPPORT_GIC600 := 1 33f85f37d4SNina Wuinclude drivers/arm/gic/v3/gicv3.mk 34f85f37d4SNina Wuinclude lib/xlat_tables_v2/xlat_tables.mk 35f85f37d4SNina Wu 36f85f37d4SNina WuPLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 37f85f37d4SNina Wu ${XLAT_TABLES_LIB_SRCS} \ 38f85f37d4SNina Wu plat/common/aarch64/crash_console_helpers.S \ 39f85f37d4SNina Wu plat/common/plat_psci_common.c 40f85f37d4SNina Wu 41f85f37d4SNina WuBL31_SOURCES += common/desc_image_load.c \ 4295cc8894SNina Wu drivers/delay_timer/delay_timer.c \ 4395cc8894SNina Wu drivers/delay_timer/generic_delay_timer.c \ 44f85f37d4SNina Wu drivers/ti/uart/aarch64/16550_console.S \ 45054af8f2SPo Xu drivers/gpio/gpio.c \ 46f85f37d4SNina Wu lib/bl_aux_params/bl_aux_params.c \ 47f85f37d4SNina Wu lib/cpus/aarch64/cortex_a55.S \ 48f85f37d4SNina Wu lib/cpus/aarch64/cortex_a76.S \ 49f85f37d4SNina Wu plat/common/plat_gicv3.c \ 50f85f37d4SNina Wu ${MTK_PLAT}/common/mtk_plat_common.c \ 51189f038fSNina Wu ${MTK_PLAT}/common/mtk_sip_svc.c \ 52f85f37d4SNina Wu ${MTK_PLAT}/common/params_setup.c \ 53*cc76896dSRex-BC Chen ${MTK_PLAT}/drivers/cirq/mt_cirq.c \ 543374752fSBo-Chen Chen ${MTK_PLAT}/drivers/gic600/mt_gic_v3.c \ 553374752fSBo-Chen Chen ${MTK_PLAT}/drivers/gpio/mtgpio_common.c \ 563374752fSBo-Chen Chen ${MTK_PLAT}/drivers/lpm/mt_lp_rm.c \ 573374752fSBo-Chen Chen ${MTK_PLAT}/drivers/pmic_wrap/pmic_wrap_init_v2.c \ 583374752fSBo-Chen Chen ${MTK_PLAT}/drivers/rtc/rtc_common.c \ 593374752fSBo-Chen Chen ${MTK_PLAT}/drivers/rtc/rtc_mt6359p.c \ 603374752fSBo-Chen Chen ${MTK_PLAT}/drivers/timer/mt_timer.c \ 613374752fSBo-Chen Chen ${MTK_PLAT}/drivers/uart/uart.c \ 62f85f37d4SNina Wu ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 63f85f37d4SNina Wu ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 64f85f37d4SNina Wu ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 65cbd6331bSHsin-Hsiung Wang ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \ 66f85f37d4SNina Wu ${MTK_PLAT_SOC}/plat_pm.c \ 6774f72b13SGreta Zhang ${MTK_PLAT_SOC}/plat_topology.c \ 68189f038fSNina Wu ${MTK_PLAT_SOC}/plat_sip_calls.c \ 69ca4c0c2eSFlora Fu ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys.c \ 70f46e1f18SFlora Fu ${MTK_PLAT_SOC}/drivers/apusys/mtk_apusys_apc.c \ 7143d7bbccSNina Wu ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \ 7243d7bbccSNina Wu ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \ 736b822d49SNina Wu ${MTK_PLAT_SOC}/drivers/devapc/devapc.c \ 745183e637SRex-BC Chen ${MTK_PLAT_SOC}/drivers/dfd/plat_dfd.c \ 7542f2fa82SXi Chen ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \ 764a128018SDehui Sun ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 77271d9497SJames Liao ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \ 78271d9497SJames Liao ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \ 79df60025fSRoger Lu ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c \ 80271d9497SJames Liao ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \ 818709c939Selly.chiang ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c \ 8246946036SYidi Lin ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c 83f85f37d4SNina Wu 84ebb44440SRoger Lu# Build SPM drivers 85ebb44440SRoger Luinclude ${MTK_PLAT_SOC}/drivers/spm/build.mk 86ebb44440SRoger Lu 87f85f37d4SNina Wu# Configs for A76 and A55 88f85f37d4SNina WuHW_ASSISTED_COHERENCY := 1 89f85f37d4SNina WuUSE_COHERENT_MEM := 0 90f85f37d4SNina WuCTX_INCLUDE_AARCH32_REGS := 0 91f85f37d4SNina Wu 92f85f37d4SNina Wu# indicate the reset vector address can be programmed 93f85f37d4SNina WuPROGRAMMABLE_RESET_ADDRESS := 1 94f85f37d4SNina Wu 95f85f37d4SNina WuCOLD_BOOT_SINGLE_CPU := 1 96f85f37d4SNina Wu 97f85f37d4SNina WuMACH_MT8192 := 1 98f85f37d4SNina Wu$(eval $(call add_define,MACH_MT8192)) 99f85f37d4SNina Wu 100f85f37d4SNina Wuinclude lib/coreboot/coreboot.mk 101f85f37d4SNina Wu 102