1f85f37d4SNina Wu /* 2f85f37d4SNina Wu * Copyright (c) 2020, MediaTek Inc. All rights reserved. 3f85f37d4SNina Wu * 4f85f37d4SNina Wu * SPDX-License-Identifier: BSD-3-Clause 5f85f37d4SNina Wu */ 6f85f37d4SNina Wu 7f85f37d4SNina Wu /* common headers */ 8*0f408247SNina Wu #include <arch_helpers.h> 9*0f408247SNina Wu #include <common/debug.h> 10*0f408247SNina Wu #include <drivers/gpio.h> 11f85f37d4SNina Wu #include <lib/psci/psci.h> 12f85f37d4SNina Wu 13f85f37d4SNina Wu /* mediatek platform specific headers */ 14*0f408247SNina Wu #include <plat_params.h> 15f85f37d4SNina Wu 16*0f408247SNina Wu /******************************************************************************* 17*0f408247SNina Wu * MTK handlers to shutdown/reboot the system 18*0f408247SNina Wu ******************************************************************************/ 19*0f408247SNina Wu static void __dead2 plat_mtk_system_reset(void) 20*0f408247SNina Wu { 21*0f408247SNina Wu struct bl_aux_gpio_info *gpio_reset = plat_get_mtk_gpio_reset(); 22*0f408247SNina Wu 23*0f408247SNina Wu INFO("MTK System Reset\n"); 24*0f408247SNina Wu 25*0f408247SNina Wu gpio_set_value(gpio_reset->index, gpio_reset->polarity); 26*0f408247SNina Wu 27*0f408247SNina Wu wfi(); 28*0f408247SNina Wu ERROR("MTK System Reset: operation not handled.\n"); 29*0f408247SNina Wu panic(); 30*0f408247SNina Wu } 31f85f37d4SNina Wu 32f85f37d4SNina Wu /******************************************************************************* 33f85f37d4SNina Wu * MTK_platform handler called when an affinity instance is about to be turned 34f85f37d4SNina Wu * on. The level and mpidr determine the affinity instance. 35f85f37d4SNina Wu ******************************************************************************/ 36f85f37d4SNina Wu static const plat_psci_ops_t plat_plat_pm_ops = { 37*0f408247SNina Wu .system_reset = plat_mtk_system_reset, 38f85f37d4SNina Wu }; 39f85f37d4SNina Wu 40f85f37d4SNina Wu int plat_setup_psci_ops(uintptr_t sec_entrypoint, 41f85f37d4SNina Wu const plat_psci_ops_t **psci_ops) 42f85f37d4SNina Wu { 43f85f37d4SNina Wu *psci_ops = &plat_plat_pm_ops; 44f85f37d4SNina Wu 45f85f37d4SNina Wu return 0; 46f85f37d4SNina Wu } 47