xref: /rk3399_ARM-atf/plat/mediatek/mt8192/include/plat_mtk_lpm.h (revision 271d9497dccc2aea2f67723c6581342ff7b5253e)
1*271d9497SJames Liao /*
2*271d9497SJames Liao  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3*271d9497SJames Liao  *
4*271d9497SJames Liao  * SPDX-License-Identifier: BSD-3-Clause
5*271d9497SJames Liao  */
6*271d9497SJames Liao 
7*271d9497SJames Liao #ifndef PLAT_MTK_LPM_H
8*271d9497SJames Liao #define PLAT_MTK_LPM_H
9*271d9497SJames Liao 
10*271d9497SJames Liao #include <lib/psci/psci.h>
11*271d9497SJames Liao #include <lib/utils_def.h>
12*271d9497SJames Liao 
13*271d9497SJames Liao #define MT_IRQ_REMAIN_MAX	U(8)
14*271d9497SJames Liao #define MT_IRQ_REMAIN_CAT_LOG	BIT(31)
15*271d9497SJames Liao 
16*271d9497SJames Liao struct mt_irqremain {
17*271d9497SJames Liao 	unsigned int count;
18*271d9497SJames Liao 	unsigned int irqs[MT_IRQ_REMAIN_MAX];
19*271d9497SJames Liao 	unsigned int wakeupsrc_cat[MT_IRQ_REMAIN_MAX];
20*271d9497SJames Liao 	unsigned int wakeupsrc[MT_IRQ_REMAIN_MAX];
21*271d9497SJames Liao };
22*271d9497SJames Liao 
23*271d9497SJames Liao #define PLAT_RC_STATUS_READY		BIT(0)
24*271d9497SJames Liao #define PLAT_RC_STATUS_FEATURE_EN	BIT(1)
25*271d9497SJames Liao #define PLAT_RC_STATUS_UART_NONSLEEP	BIT(31)
26*271d9497SJames Liao 
27*271d9497SJames Liao struct mt_lpm_tz {
28*271d9497SJames Liao 	int (*pwr_prompt)(unsigned int cpu, const psci_power_state_t *state);
29*271d9497SJames Liao 	int (*pwr_reflect)(unsigned int cpu, const psci_power_state_t *state);
30*271d9497SJames Liao 
31*271d9497SJames Liao 	int (*pwr_cpu_on)(unsigned int cpu, const psci_power_state_t *state);
32*271d9497SJames Liao 	int (*pwr_cpu_dwn)(unsigned int cpu, const psci_power_state_t *state);
33*271d9497SJames Liao 
34*271d9497SJames Liao 	int (*pwr_cluster_on)(unsigned int cpu,
35*271d9497SJames Liao 					const psci_power_state_t *state);
36*271d9497SJames Liao 	int (*pwr_cluster_dwn)(unsigned int cpu,
37*271d9497SJames Liao 					const psci_power_state_t *state);
38*271d9497SJames Liao 
39*271d9497SJames Liao 	int (*pwr_mcusys_on)(unsigned int cpu, const psci_power_state_t *state);
40*271d9497SJames Liao 	int (*pwr_mcusys_on_finished)(unsigned int cpu,
41*271d9497SJames Liao 					const psci_power_state_t *state);
42*271d9497SJames Liao 	int (*pwr_mcusys_dwn)(unsigned int cpu,
43*271d9497SJames Liao 					const psci_power_state_t *state);
44*271d9497SJames Liao };
45*271d9497SJames Liao 
46*271d9497SJames Liao const struct mt_lpm_tz *mt_plat_cpu_pm_init(void);
47*271d9497SJames Liao 
48*271d9497SJames Liao #endif /* PLAT_MTK_LPM_H */
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