xref: /rk3399_ARM-atf/plat/mediatek/mt8192/include/plat_mtk_lpm.h (revision 258f6a2d40ede90127abfefa9af594a4943789d7)
1271d9497SJames Liao /*
2271d9497SJames Liao  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3271d9497SJames Liao  *
4271d9497SJames Liao  * SPDX-License-Identifier: BSD-3-Clause
5271d9497SJames Liao  */
6271d9497SJames Liao 
7271d9497SJames Liao #ifndef PLAT_MTK_LPM_H
8271d9497SJames Liao #define PLAT_MTK_LPM_H
9271d9497SJames Liao 
10271d9497SJames Liao #include <lib/psci/psci.h>
11271d9497SJames Liao #include <lib/utils_def.h>
12271d9497SJames Liao 
13*df60025fSRoger Lu #define MT_IRQ_REMAIN_MAX	U(32)
14271d9497SJames Liao #define MT_IRQ_REMAIN_CAT_LOG	BIT(31)
15271d9497SJames Liao 
16271d9497SJames Liao struct mt_irqremain {
17271d9497SJames Liao 	unsigned int count;
18271d9497SJames Liao 	unsigned int irqs[MT_IRQ_REMAIN_MAX];
19271d9497SJames Liao 	unsigned int wakeupsrc_cat[MT_IRQ_REMAIN_MAX];
20271d9497SJames Liao 	unsigned int wakeupsrc[MT_IRQ_REMAIN_MAX];
21271d9497SJames Liao };
22271d9497SJames Liao 
23271d9497SJames Liao #define PLAT_RC_STATUS_READY		BIT(0)
24271d9497SJames Liao #define PLAT_RC_STATUS_FEATURE_EN	BIT(1)
25271d9497SJames Liao #define PLAT_RC_STATUS_UART_NONSLEEP	BIT(31)
26271d9497SJames Liao 
27271d9497SJames Liao struct mt_lpm_tz {
28271d9497SJames Liao 	int (*pwr_prompt)(unsigned int cpu, const psci_power_state_t *state);
29271d9497SJames Liao 	int (*pwr_reflect)(unsigned int cpu, const psci_power_state_t *state);
30271d9497SJames Liao 
31271d9497SJames Liao 	int (*pwr_cpu_on)(unsigned int cpu, const psci_power_state_t *state);
32271d9497SJames Liao 	int (*pwr_cpu_dwn)(unsigned int cpu, const psci_power_state_t *state);
33271d9497SJames Liao 
34271d9497SJames Liao 	int (*pwr_cluster_on)(unsigned int cpu,
35271d9497SJames Liao 					const psci_power_state_t *state);
36271d9497SJames Liao 	int (*pwr_cluster_dwn)(unsigned int cpu,
37271d9497SJames Liao 					const psci_power_state_t *state);
38271d9497SJames Liao 
39271d9497SJames Liao 	int (*pwr_mcusys_on)(unsigned int cpu, const psci_power_state_t *state);
40271d9497SJames Liao 	int (*pwr_mcusys_on_finished)(unsigned int cpu,
41271d9497SJames Liao 					const psci_power_state_t *state);
42271d9497SJames Liao 	int (*pwr_mcusys_dwn)(unsigned int cpu,
43271d9497SJames Liao 					const psci_power_state_t *state);
44271d9497SJames Liao };
45271d9497SJames Liao 
46271d9497SJames Liao const struct mt_lpm_tz *mt_plat_cpu_pm_init(void);
47271d9497SJames Liao 
48271d9497SJames Liao #endif /* PLAT_MTK_LPM_H */
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