xref: /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spmc/mtspmc.h (revision 77990838a4486bc266377243af3e328c0daa9f3e)
1*3d1e536eSJames Liao /*
2*3d1e536eSJames Liao  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3*3d1e536eSJames Liao  *
4*3d1e536eSJames Liao  * SPDX-License-Identifier: BSD-3-Clause
5*3d1e536eSJames Liao  */
6*3d1e536eSJames Liao 
7*3d1e536eSJames Liao #ifndef MTSPMC_H
8*3d1e536eSJames Liao #define MTSPMC_H
9*3d1e536eSJames Liao 
10*3d1e536eSJames Liao #include <stdint.h>
11*3d1e536eSJames Liao 
12*3d1e536eSJames Liao int spmc_init(void);
13*3d1e536eSJames Liao 
14*3d1e536eSJames Liao void spm_poweron_cpu(uint32_t cluster, uint32_t cpu);
15*3d1e536eSJames Liao void spm_poweroff_cpu(uint32_t cluster, uint32_t cpu);
16*3d1e536eSJames Liao 
17*3d1e536eSJames Liao void spm_poweroff_cluster(uint32_t cluster);
18*3d1e536eSJames Liao void spm_poweron_cluster(uint32_t cluster);
19*3d1e536eSJames Liao 
20*3d1e536eSJames Liao bool spm_get_cpu_powerstate(uint32_t cluster, uint32_t cpu);
21*3d1e536eSJames Liao bool spm_get_cluster_powerstate(uint32_t cluster);
22*3d1e536eSJames Liao bool spm_get_powerstate(uint32_t mask);
23*3d1e536eSJames Liao 
24*3d1e536eSJames Liao void mcucfg_init_archstate(uint32_t cluster, uint32_t cpu, bool arm64);
25*3d1e536eSJames Liao void mcucfg_set_bootaddr(uint32_t cluster, uint32_t cpu, uintptr_t bootaddr);
26*3d1e536eSJames Liao uintptr_t mcucfg_get_bootaddr(uint32_t cluster, uint32_t cpu);
27*3d1e536eSJames Liao 
28*3d1e536eSJames Liao void mcucfg_disable_gic_wakeup(uint32_t cluster, uint32_t cpu);
29*3d1e536eSJames Liao void mcucfg_enable_gic_wakeup(uint32_t cluster, uint32_t cpu);
30*3d1e536eSJames Liao 
31*3d1e536eSJames Liao #endif /* MTSPMC_H */
32